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  1. /*
  2. * mmx.h
  3. * Copyright (C) 1997-2001 H. Dietz and R. Fisher
  4. */
  5. /*
  6. * The type of an value that fits in an MMX register (note that long
  7. * long constant values MUST be suffixed by LL and unsigned long long
  8. * values by ULL, lest they be truncated by the compiler)
  9. */
  10. typedef union {
  11. long long q; /* Quadword (64-bit) value */
  12. unsigned long long uq; /* Unsigned Quadword */
  13. int d[2]; /* 2 Doubleword (32-bit) values */
  14. unsigned int ud[2]; /* 2 Unsigned Doubleword */
  15. short w[4]; /* 4 Word (16-bit) values */
  16. unsigned short uw[4]; /* 4 Unsigned Word */
  17. char b[8]; /* 8 Byte (8-bit) values */
  18. unsigned char ub[8]; /* 8 Unsigned Byte */
  19. float s[2]; /* Single-precision (32-bit) value */
  20. } mmx_t; /* On an 8-byte (64-bit) boundary */
  21. #define mmx_i2r(op,imm,reg) \
  22. __asm__ __volatile__ (#op " %0, %%" #reg \
  23. : /* nothing */ \
  24. : "i" (imm) )
  25. #define mmx_m2r(op,mem,reg) \
  26. __asm__ __volatile__ (#op " %0, %%" #reg \
  27. : /* nothing */ \
  28. : "m" (mem))
  29. #define mmx_r2m(op,reg,mem) \
  30. __asm__ __volatile__ (#op " %%" #reg ", %0" \
  31. : "=m" (mem) \
  32. : /* nothing */ )
  33. #define mmx_r2r(op,regs,regd) \
  34. __asm__ __volatile__ (#op " %" #regs ", %" #regd)
  35. #define emms() __asm__ __volatile__ ("emms")
  36. #define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
  37. #define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
  38. #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
  39. #define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
  40. #define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
  41. #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
  42. #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
  43. #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
  44. #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
  45. #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
  46. #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
  47. #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
  48. #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
  49. #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
  50. #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
  51. #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
  52. #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
  53. #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
  54. #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
  55. #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
  56. #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
  57. #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
  58. #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
  59. #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
  60. #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
  61. #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
  62. #define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
  63. #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
  64. #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
  65. #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
  66. #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
  67. #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
  68. #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
  69. #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
  70. #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
  71. #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
  72. #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
  73. #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
  74. #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
  75. #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
  76. #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
  77. #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
  78. #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
  79. #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
  80. #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
  81. #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
  82. #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
  83. #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
  84. #define por_m2r(var,reg) mmx_m2r (por, var, reg)
  85. #define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
  86. #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
  87. #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
  88. #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
  89. #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
  90. #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
  91. #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
  92. #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
  93. #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
  94. #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
  95. #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
  96. #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
  97. #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
  98. #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
  99. #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
  100. #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
  101. #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
  102. #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
  103. #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
  104. #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
  105. #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
  106. #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
  107. #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
  108. #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
  109. #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
  110. #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
  111. #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
  112. #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
  113. #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
  114. #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
  115. #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
  116. #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
  117. #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
  118. #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
  119. #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
  120. #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
  121. #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
  122. #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
  123. #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
  124. #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
  125. #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
  126. #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
  127. #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
  128. #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
  129. #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
  130. #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
  131. #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
  132. #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
  133. #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
  134. #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
  135. #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
  136. #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
  137. #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
  138. /* 3DNOW extensions */
  139. #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
  140. #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
  141. /* AMD MMX extensions - also available in intel SSE */
  142. #define mmx_m2ri(op,mem,reg,imm) \
  143. __asm__ __volatile__ (#op " %1, %0, %%" #reg \
  144. : /* nothing */ \
  145. : "X" (mem), "X" (imm))
  146. #define mmx_r2ri(op,regs,regd,imm) \
  147. __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
  148. : /* nothing */ \
  149. : "X" (imm) )
  150. #define mmx_fetch(mem,hint) \
  151. __asm__ __volatile__ ("prefetch" #hint " %0" \
  152. : /* nothing */ \
  153. : "X" (mem))
  154. #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
  155. #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
  156. #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
  157. #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
  158. #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
  159. #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
  160. #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
  161. #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
  162. #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
  163. #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
  164. #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
  165. #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
  166. #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
  167. #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
  168. #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
  169. #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
  170. #define pmovmskb(mmreg,reg) \
  171. __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg)
  172. #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
  173. #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
  174. #define prefetcht0(mem) mmx_fetch (mem, t0)
  175. #define prefetcht1(mem) mmx_fetch (mem, t1)
  176. #define prefetcht2(mem) mmx_fetch (mem, t2)
  177. #define prefetchnta(mem) mmx_fetch (mem, nta)
  178. #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
  179. #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
  180. #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
  181. #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
  182. #define sfence() __asm__ __volatile__ ("sfence\n\t")