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  1. /*
  2. * Copyright (c) 2002 Brian Foley
  3. * Copyright (c) 2002 Dieter Shirley
  4. *
  5. * This library is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU Lesser General Public
  7. * License as published by the Free Software Foundation; either
  8. * version 2 of the License, or (at your option) any later version.
  9. *
  10. * This library is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * Lesser General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU Lesser General Public
  16. * License along with this library; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include "../dsputil.h"
  20. #include "dsputil_ppc.h"
  21. #ifdef HAVE_ALTIVEC
  22. #include "dsputil_altivec.h"
  23. #endif
  24. int mm_flags = 0;
  25. int mm_support(void)
  26. {
  27. int result = 0;
  28. #if HAVE_ALTIVEC
  29. if (has_altivec()) {
  30. result |= MM_ALTIVEC;
  31. }
  32. #endif /* result */
  33. return result;
  34. }
  35. #ifdef POWERPC_TBL_PERFORMANCE_REPORT
  36. unsigned long long perfdata[powerpc_perf_total][powerpc_data_total];
  37. /* list below must match enum in dsputil_ppc.h */
  38. static unsigned char* perfname[] = {
  39. "fft_calc_altivec",
  40. "gmc1_altivec",
  41. "dct_unquantize_h263_altivec",
  42. "idct_add_altivec",
  43. "idct_put_altivec",
  44. "put_pixels16_altivec",
  45. "avg_pixels16_altivec",
  46. "avg_pixels8_altivec",
  47. "put_pixels8_xy2_altivec",
  48. "put_no_rnd_pixels8_xy2_altivec",
  49. "put_pixels16_xy2_altivec",
  50. "put_no_rnd_pixels16_xy2_altivec",
  51. "clear_blocks_dcbz32_ppc"
  52. };
  53. #ifdef POWERPC_PERF_USE_PMC
  54. unsigned long long perfdata_miss[powerpc_perf_total][powerpc_data_total];
  55. #endif
  56. #include <stdio.h>
  57. #endif
  58. #ifdef POWERPC_TBL_PERFORMANCE_REPORT
  59. void powerpc_display_perf_report(void)
  60. {
  61. int i;
  62. #ifndef POWERPC_PERF_USE_PMC
  63. fprintf(stderr, "PowerPC performance report\n Values are from the Time Base register, and represent 4 bus cycles.\n");
  64. #else /* POWERPC_PERF_USE_PMC */
  65. fprintf(stderr, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
  66. #endif /* POWERPC_PERF_USE_PMC */
  67. for(i = 0 ; i < powerpc_perf_total ; i++)
  68. {
  69. if (perfdata[i][powerpc_data_num] != (unsigned long long)0)
  70. fprintf(stderr, " Function \"%s\" (pmc1):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
  71. perfname[i],
  72. perfdata[i][powerpc_data_min],
  73. perfdata[i][powerpc_data_max],
  74. (double)perfdata[i][powerpc_data_sum] /
  75. (double)perfdata[i][powerpc_data_num],
  76. perfdata[i][powerpc_data_num]);
  77. #ifdef POWERPC_PERF_USE_PMC
  78. if (perfdata_miss[i][powerpc_data_num] != (unsigned long long)0)
  79. fprintf(stderr, " Function \"%s\" (pmc2):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
  80. perfname[i],
  81. perfdata_miss[i][powerpc_data_min],
  82. perfdata_miss[i][powerpc_data_max],
  83. (double)perfdata_miss[i][powerpc_data_sum] /
  84. (double)perfdata_miss[i][powerpc_data_num],
  85. perfdata_miss[i][powerpc_data_num]);
  86. #endif
  87. }
  88. }
  89. #endif /* POWERPC_TBL_PERFORMANCE_REPORT */
  90. /* ***** WARNING ***** WARNING ***** WARNING ***** */
  91. /*
  92. clear_blocks_dcbz32_ppc will not work properly
  93. on PowerPC processors with a cache line size
  94. not equal to 32 bytes.
  95. Fortunately all processor used by Apple up to
  96. at least the 7450 (aka second generation G4)
  97. use 32 bytes cache line.
  98. This is due to the use of the 'dcbz' instruction.
  99. It simply clear to zero a single cache line,
  100. so you need to know the cache line size to use it !
  101. It's absurd, but it's fast...
  102. */
  103. void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
  104. {
  105. POWERPC_TBL_DECLARE(powerpc_clear_blocks_dcbz32, 1);
  106. register int misal = ((unsigned long)blocks & 0x00000010);
  107. register int i = 0;
  108. POWERPC_TBL_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
  109. #if 1
  110. if (misal) {
  111. ((unsigned long*)blocks)[0] = 0L;
  112. ((unsigned long*)blocks)[1] = 0L;
  113. ((unsigned long*)blocks)[2] = 0L;
  114. ((unsigned long*)blocks)[3] = 0L;
  115. i += 16;
  116. }
  117. for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) {
  118. asm volatile("dcbz %0,%1" : : "r" (blocks), "r" (i) : "memory");
  119. }
  120. if (misal) {
  121. ((unsigned long*)blocks)[188] = 0L;
  122. ((unsigned long*)blocks)[189] = 0L;
  123. ((unsigned long*)blocks)[190] = 0L;
  124. ((unsigned long*)blocks)[191] = 0L;
  125. i += 16;
  126. }
  127. #else
  128. memset(blocks, 0, sizeof(DCTELEM)*6*64);
  129. #endif
  130. POWERPC_TBL_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
  131. }
  132. /* check dcbz report how many bytes are set to 0 by dcbz */
  133. long check_dcbz_effect(void)
  134. {
  135. register char *fakedata = (char*)av_malloc(1024);
  136. register char *fakedata_middle;
  137. register long zero = 0;
  138. register long i = 0;
  139. long count = 0;
  140. if (!fakedata)
  141. {
  142. return 0L;
  143. }
  144. fakedata_middle = (fakedata + 512);
  145. memset(fakedata, 0xFF, 1024);
  146. asm volatile("dcbz %0, %1" : : "r" (fakedata_middle), "r" (zero));
  147. for (i = 0; i < 1024 ; i ++)
  148. {
  149. if (fakedata[i] == (char)0)
  150. count++;
  151. }
  152. av_free(fakedata);
  153. return count;
  154. }
  155. void dsputil_init_ppc(DSPContext* c, unsigned mask)
  156. {
  157. // Common optimisations whether Altivec or not
  158. switch (check_dcbz_effect()) {
  159. case 32:
  160. c->clear_blocks = clear_blocks_dcbz32_ppc;
  161. break;
  162. default:
  163. break;
  164. }
  165. #if HAVE_ALTIVEC
  166. if (has_altivec()) {
  167. mm_flags |= MM_ALTIVEC;
  168. // Altivec specific optimisations
  169. c->pix_abs16x16_x2 = pix_abs16x16_x2_altivec;
  170. c->pix_abs16x16_y2 = pix_abs16x16_y2_altivec;
  171. c->pix_abs16x16_xy2 = pix_abs16x16_xy2_altivec;
  172. c->pix_abs16x16 = pix_abs16x16_altivec;
  173. c->pix_abs8x8 = pix_abs8x8_altivec;
  174. c->sad[0]= sad16x16_altivec;
  175. c->sad[1]= sad8x8_altivec;
  176. c->pix_norm1 = pix_norm1_altivec;
  177. c->sse[1]= sse8_altivec;
  178. c->sse[0]= sse16_altivec;
  179. c->pix_sum = pix_sum_altivec;
  180. c->diff_pixels = diff_pixels_altivec;
  181. c->get_pixels = get_pixels_altivec;
  182. // next one disabled as it's untested.
  183. #if 0
  184. c->add_bytes= add_bytes_altivec;
  185. #endif /* 0 */
  186. c->put_pixels_tab[0][0] = put_pixels16_altivec;
  187. c->avg_pixels_tab[0][0] = avg_pixels16_altivec;
  188. // next one disabled as it's untested.
  189. #if 0
  190. c->avg_pixels_tab[1][0] = avg_pixels8_altivec;
  191. #endif /* 0 */
  192. c->put_pixels_tab[1][3] = put_pixels8_xy2_altivec;
  193. c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_altivec;
  194. c->put_pixels_tab[0][3] = put_pixels16_xy2_altivec;
  195. c->put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_altivec;
  196. c->gmc1 = gmc1_altivec;
  197. #ifdef POWERPC_TBL_PERFORMANCE_REPORT
  198. {
  199. int i;
  200. for (i = 0 ; i < powerpc_perf_total ; i++)
  201. {
  202. perfdata[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF;
  203. perfdata[i][powerpc_data_max] = 0x0000000000000000;
  204. perfdata[i][powerpc_data_sum] = 0x0000000000000000;
  205. perfdata[i][powerpc_data_num] = 0x0000000000000000;
  206. #ifdef POWERPC_PERF_USE_PMC
  207. perfdata_miss[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF;
  208. perfdata_miss[i][powerpc_data_max] = 0x0000000000000000;
  209. perfdata_miss[i][powerpc_data_sum] = 0x0000000000000000;
  210. perfdata_miss[i][powerpc_data_num] = 0x0000000000000000;
  211. #endif /* POWERPC_PERF_USE_PMC */
  212. }
  213. }
  214. #endif /* POWERPC_TBL_PERFORMANCE_REPORT */
  215. } else
  216. #endif /* HAVE_ALTIVEC */
  217. {
  218. // Non-AltiVec PPC optimisations
  219. // ... pending ...
  220. }
  221. }