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FFmpeg/libavcodec/x86/vc1dsp_mmx.c

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  1. /*

  2.  * VC-1 and WMV3 - DSP functions MMX-optimized

  3.  * Copyright (c) 2007 Christophe GISQUET <christophe.gisquet@free.fr>

  4.  *

  5.  * Permission is hereby granted, free of charge, to any person

  6.  * obtaining a copy of this software and associated documentation

  7.  * files (the "Software"), to deal in the Software without

  8.  * restriction, including without limitation the rights to use,

  9.  * copy, modify, merge, publish, distribute, sublicense, and/or sell

  10.  * copies of the Software, and to permit persons to whom the

  11.  * Software is furnished to do so, subject to the following

  12.  * conditions:

  13.  *

  14.  * The above copyright notice and this permission notice shall be

  15.  * included in all copies or substantial portions of the Software.

  16.  *

  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

  18.  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

  19.  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

  20.  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

  21.  * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

  22.  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

  23.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

  24.  * OTHER DEALINGS IN THE SOFTWARE.

  25.  */

  26. 

  27. #include "libavutil/cpu.h"

  28. #include "libavutil/mem.h"

  29. #include "libavutil/mem_internal.h"

  30. #include "libavutil/x86/asm.h"

  31. #include "libavutil/x86/cpu.h"

  32. #include "libavcodec/vc1dsp.h"

  33. #include "constants.h"

  34. #include "fpel.h"

  35. #include "vc1dsp.h"

  36. 

  37. #if HAVE_6REGS && HAVE_INLINE_ASM && HAVE_MMX_EXTERNAL

  38. 

  39. void ff_vc1_put_ver_16b_shift2_mmx(int16_t *dst,

  40.                                    const uint8_t *src, x86_reg stride,

  41.                                    int rnd, int64_t shift);

  42. void ff_vc1_put_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,

  43.                                    const int16_t *src, int rnd);

  44. void ff_vc1_avg_hor_16b_shift2_mmxext(uint8_t *dst, x86_reg stride,

  45.                                       const int16_t *src, int rnd);

  46. 

  47. #define OP_PUT(S,D)

  48. #define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t"

  49. 

  50. /** Add rounder from mm7 to mm3 and pack result at destination */

  51. #define NORMALIZE_MMX(SHIFT)                                    \

  52.      "paddw     %%mm7, %%mm3           \n\t" /* +bias-r */      \

  53.      "paddw     %%mm7, %%mm4           \n\t" /* +bias-r */      \

  54.      "psraw     "SHIFT", %%mm3         \n\t"                    \

  55.      "psraw     "SHIFT", %%mm4         \n\t"

  56. 

  57. #define TRANSFER_DO_PACK(OP)                    \

  58.      "packuswb  %%mm4, %%mm3           \n\t"    \

  59.      OP((%2), %%mm3)                            \

  60.      "movq      %%mm3, (%2)            \n\t"

  61. 

  62. #define TRANSFER_DONT_PACK(OP)                  \

  63.      OP(0(%2), %%mm3)                           \

  64.      OP(8(%2), %%mm4)                           \

  65.      "movq      %%mm3, 0(%2)           \n\t"    \

  66.      "movq      %%mm4, 8(%2)           \n\t"

  67. 

  68. /** @see MSPEL_FILTER13_CORE for use as UNPACK macro */

  69. #define DO_UNPACK(reg)  "punpcklbw %%mm0, " reg "\n\t"

  70. #define DONT_UNPACK(reg)

  71. 

  72. /** Compute the rounder 32-r or 8-r and unpacks it to mm7 */

  73. #define LOAD_ROUNDER_MMX(ROUND)                 \

  74.      "movd      "ROUND", %%mm7         \n\t"    \

  75.      "punpcklwd %%mm7, %%mm7           \n\t"    \

  76.      "punpckldq %%mm7, %%mm7           \n\t"

  77. 

  78. /**

  79.  * Purely vertical or horizontal 1/2 shift interpolation.

  80.  * Sacrifice mm6 for *9 factor.

  81.  */

  82. #define VC1_SHIFT2(OP, OPNAME)\

  83. static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\

  84.                                      x86_reg stride, int rnd, x86_reg offset)\

  85. {\

  86.     rnd = 8-rnd;\

  87.     __asm__ volatile(\

  88.         "mov       $8, %%"FF_REG_c"        \n\t"\

  89.         LOAD_ROUNDER_MMX("%5")\

  90.         "movq      "MANGLE(ff_pw_9)", %%mm6\n\t"\

  91.         "1:                                \n\t"\

  92.         "movd      0(%0   ), %%mm3         \n\t"\

  93.         "movd      4(%0   ), %%mm4         \n\t"\

  94.         "movd      0(%0,%2), %%mm1         \n\t"\

  95.         "movd      4(%0,%2), %%mm2         \n\t"\

  96.         "add       %2, %0                  \n\t"\

  97.         "punpcklbw %%mm0, %%mm3            \n\t"\

  98.         "punpcklbw %%mm0, %%mm4            \n\t"\

  99.         "punpcklbw %%mm0, %%mm1            \n\t"\

  100.         "punpcklbw %%mm0, %%mm2            \n\t"\

  101.         "paddw     %%mm1, %%mm3            \n\t"\

  102.         "paddw     %%mm2, %%mm4            \n\t"\

  103.         "movd      0(%0,%3), %%mm1         \n\t"\

  104.         "movd      4(%0,%3), %%mm2         \n\t"\

  105.         "pmullw    %%mm6, %%mm3            \n\t" /* 0,9,9,0*/\

  106.         "pmullw    %%mm6, %%mm4            \n\t" /* 0,9,9,0*/\

  107.         "punpcklbw %%mm0, %%mm1            \n\t"\

  108.         "punpcklbw %%mm0, %%mm2            \n\t"\

  109.         "psubw     %%mm1, %%mm3            \n\t" /*-1,9,9,0*/\

  110.         "psubw     %%mm2, %%mm4            \n\t" /*-1,9,9,0*/\

  111.         "movd      0(%0,%2), %%mm1         \n\t"\

  112.         "movd      4(%0,%2), %%mm2         \n\t"\

  113.         "punpcklbw %%mm0, %%mm1            \n\t"\

  114.         "punpcklbw %%mm0, %%mm2            \n\t"\

  115.         "psubw     %%mm1, %%mm3            \n\t" /*-1,9,9,-1*/\

  116.         "psubw     %%mm2, %%mm4            \n\t" /*-1,9,9,-1*/\

  117.         NORMALIZE_MMX("$4")\

  118.         "packuswb  %%mm4, %%mm3            \n\t"\

  119.         OP((%1), %%mm3)\

  120.         "movq      %%mm3, (%1)             \n\t"\

  121.         "add       %6, %0                  \n\t"\

  122.         "add       %4, %1                  \n\t"\

  123.         "dec       %%"FF_REG_c"            \n\t"\

  124.         "jnz 1b                            \n\t"\

  125.         : "+r"(src),  "+r"(dst)\

  126.         : "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\

  127.           "g"(stride-offset)\

  128.           NAMED_CONSTRAINTS_ADD(ff_pw_9)\

  129.         : "%"FF_REG_c, "memory"\

  130.     );\

  131. }

  132. 

  133. VC1_SHIFT2(OP_PUT, put_)

  134. VC1_SHIFT2(OP_AVG, avg_)

  135. 

  136. /**

  137.  * Core of the 1/4 and 3/4 shift bicubic interpolation.

  138.  *

  139.  * @param UNPACK  Macro unpacking arguments from 8 to 16 bits (can be empty).

  140.  * @param MOVQ    "movd 1" or "movq 2", if data read is already unpacked.

  141.  * @param A1      Address of 1st tap (beware of unpacked/packed).

  142.  * @param A2      Address of 2nd tap

  143.  * @param A3      Address of 3rd tap

  144.  * @param A4      Address of 4th tap

  145.  */

  146. #define MSPEL_FILTER13_CORE(UNPACK, MOVQ, A1, A2, A3, A4)       \

  147.      MOVQ "*0+"A1", %%mm1       \n\t"                           \

  148.      MOVQ "*4+"A1", %%mm2       \n\t"                           \

  149.      UNPACK("%%mm1")                                            \

  150.      UNPACK("%%mm2")                                            \

  151.      "pmullw    "MANGLE(ff_pw_3)", %%mm1\n\t"                   \

  152.      "pmullw    "MANGLE(ff_pw_3)", %%mm2\n\t"                   \

  153.      MOVQ "*0+"A2", %%mm3       \n\t"                           \

  154.      MOVQ "*4+"A2", %%mm4       \n\t"                           \

  155.      UNPACK("%%mm3")                                            \

  156.      UNPACK("%%mm4")                                            \

  157.      "pmullw    %%mm6, %%mm3    \n\t" /* *18 */                 \

  158.      "pmullw    %%mm6, %%mm4    \n\t" /* *18 */                 \

  159.      "psubw     %%mm1, %%mm3    \n\t" /* 18,-3 */               \

  160.      "psubw     %%mm2, %%mm4    \n\t" /* 18,-3 */               \

  161.      MOVQ "*0+"A4", %%mm1       \n\t"                           \

  162.      MOVQ "*4+"A4", %%mm2       \n\t"                           \

  163.      UNPACK("%%mm1")                                            \

  164.      UNPACK("%%mm2")                                            \

  165.      "psllw     $2, %%mm1       \n\t" /* 4* */                  \

  166.      "psllw     $2, %%mm2       \n\t" /* 4* */                  \

  167.      "psubw     %%mm1, %%mm3    \n\t" /* -4,18,-3 */            \

  168.      "psubw     %%mm2, %%mm4    \n\t" /* -4,18,-3 */            \

  169.      MOVQ "*0+"A3", %%mm1       \n\t"                           \

  170.      MOVQ "*4+"A3", %%mm2       \n\t"                           \

  171.      UNPACK("%%mm1")                                            \

  172.      UNPACK("%%mm2")                                            \

  173.      "pmullw    %%mm5, %%mm1    \n\t" /* *53 */                 \

  174.      "pmullw    %%mm5, %%mm2    \n\t" /* *53 */                 \

  175.      "paddw     %%mm1, %%mm3    \n\t" /* 4,53,18,-3 */          \

  176.      "paddw     %%mm2, %%mm4    \n\t" /* 4,53,18,-3 */

  177. 

  178. /**

  179.  * Macro to build the vertical 16 bits version of vc1_put_shift[13].

  180.  * Here, offset=src_stride. Parameters passed A1 to A4 must use

  181.  * %3 (src_stride) and %4 (3*src_stride).

  182.  *

  183.  * @param  NAME   Either 1 or 3

  184.  * @see MSPEL_FILTER13_CORE for information on A1->A4

  185.  */

  186. #define MSPEL_FILTER13_VER_16B(NAME, A1, A2, A3, A4)                    \

  187. static void                                                             \

  188. vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src,      \

  189.                                  x86_reg src_stride,                   \

  190.                                  int rnd, int64_t shift)                \

  191. {                                                                       \

  192.     int h = 8;                                                          \

  193.     src -= src_stride;                                                  \

  194.     __asm__ volatile(                                                       \

  195.         LOAD_ROUNDER_MMX("%5")                                          \

  196.         "movq      "MANGLE(ff_pw_53)", %%mm5\n\t"                       \

  197.         "movq      "MANGLE(ff_pw_18)", %%mm6\n\t"                       \

  198.         ".p2align 3                \n\t"                                \

  199.         "1:                        \n\t"                                \

  200.         MSPEL_FILTER13_CORE(DO_UNPACK, "movd  1", A1, A2, A3, A4)       \

  201.         NORMALIZE_MMX("%6")                                             \

  202.         TRANSFER_DONT_PACK(OP_PUT)                                      \

  203.         /* Last 3 (in fact 4) bytes on the line */                      \

  204.         "movd      8+"A1", %%mm1   \n\t"                                \

  205.         DO_UNPACK("%%mm1")                                              \

  206.         "movq      %%mm1, %%mm3    \n\t"                                \

  207.         "paddw     %%mm1, %%mm1    \n\t"                                \

  208.         "paddw     %%mm3, %%mm1    \n\t" /* 3* */                       \

  209.         "movd      8+"A2", %%mm3   \n\t"                                \

  210.         DO_UNPACK("%%mm3")                                              \

  211.         "pmullw    %%mm6, %%mm3    \n\t" /* *18 */                      \

  212.         "psubw     %%mm1, %%mm3    \n\t" /*18,-3 */                     \

  213.         "movd      8+"A3", %%mm1   \n\t"                                \

  214.         DO_UNPACK("%%mm1")                                              \

  215.         "pmullw    %%mm5, %%mm1    \n\t" /* *53 */                      \

  216.         "paddw     %%mm1, %%mm3    \n\t" /*53,18,-3 */                  \

  217.         "movd      8+"A4", %%mm1   \n\t"                                \

  218.         DO_UNPACK("%%mm1")                                              \

  219.         "psllw     $2, %%mm1       \n\t" /* 4* */                       \

  220.         "psubw     %%mm1, %%mm3    \n\t"                                \

  221.         "paddw     %%mm7, %%mm3    \n\t"                                \

  222.         "psraw     %6, %%mm3       \n\t"                                \

  223.         "movq      %%mm3, 16(%2)   \n\t"                                \

  224.         "add       %3, %1          \n\t"                                \

  225.         "add       $24, %2         \n\t"                                \

  226.         "decl      %0              \n\t"                                \

  227.         "jnz 1b                    \n\t"                                \

  228.         : "+r"(h), "+r" (src),  "+r" (dst)                              \

  229.         : "r"(src_stride), "r"(3*src_stride),                           \

  230.           "m"(rnd), "m"(shift)                                          \

  231.           NAMED_CONSTRAINTS_ADD(ff_pw_3,ff_pw_53,ff_pw_18)              \

  232.         : "memory"                                                      \

  233.     );                                                                  \

  234. }

  235. 

  236. /**

  237.  * Macro to build the horizontal 16 bits version of vc1_put_shift[13].

  238.  * Here, offset=16 bits, so parameters passed A1 to A4 should be simple.

  239.  *

  240.  * @param  NAME   Either 1 or 3

  241.  * @see MSPEL_FILTER13_CORE for information on A1->A4

  242.  */

  243. #define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME)        \

  244. static void                                                             \

  245. OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride,    \

  246.                                  const int16_t *src, int rnd)           \

  247. {                                                                       \

  248.     int h = 8;                                                          \

  249.     src -= 1;                                                           \

  250.     rnd -= (-4+58+13-3)*256; /* Add -256 bias */                        \

  251.     __asm__ volatile(                                                       \

  252.         LOAD_ROUNDER_MMX("%4")                                          \

  253.         "movq      "MANGLE(ff_pw_18)", %%mm6   \n\t"                    \

  254.         "movq      "MANGLE(ff_pw_53)", %%mm5   \n\t"                    \

  255.         ".p2align 3                \n\t"                                \

  256.         "1:                        \n\t"                                \

  257.         MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4)      \

  258.         NORMALIZE_MMX("$7")                                             \

  259.         /* Remove bias */                                               \

  260.         "paddw     "MANGLE(ff_pw_128)", %%mm3  \n\t"                    \

  261.         "paddw     "MANGLE(ff_pw_128)", %%mm4  \n\t"                    \

  262.         TRANSFER_DO_PACK(OP)                                            \

  263.         "add       $24, %1         \n\t"                                \

  264.         "add       %3, %2          \n\t"                                \

  265.         "decl      %0              \n\t"                                \

  266.         "jnz 1b                    \n\t"                                \

  267.         : "+r"(h), "+r" (src),  "+r" (dst)                              \

  268.         : "r"(stride), "m"(rnd)                                         \

  269.           NAMED_CONSTRAINTS_ADD(ff_pw_3,ff_pw_18,ff_pw_53,ff_pw_128)    \

  270.         : "memory"                                                      \

  271.     );                                                                  \

  272. }

  273. 

  274. /**

  275.  * Macro to build the 8 bits, any direction, version of vc1_put_shift[13].

  276.  * Here, offset=src_stride. Parameters passed A1 to A4 must use

  277.  * %3 (offset) and %4 (3*offset).

  278.  *

  279.  * @param  NAME   Either 1 or 3

  280.  * @see MSPEL_FILTER13_CORE for information on A1->A4

  281.  */

  282. #define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME)             \

  283. static void                                                             \

  284. OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src,         \

  285.                         x86_reg stride, int rnd, x86_reg offset)      \

  286. {                                                                       \

  287.     int h = 8;                                                          \

  288.     src -= offset;                                                      \

  289.     rnd = 32-rnd;                                                       \

  290.     __asm__ volatile (                                                      \

  291.         LOAD_ROUNDER_MMX("%6")                                          \

  292.         "movq      "MANGLE(ff_pw_53)", %%mm5       \n\t"                \

  293.         "movq      "MANGLE(ff_pw_18)", %%mm6       \n\t"                \

  294.         ".p2align 3                \n\t"                                \

  295.         "1:                        \n\t"                                \

  296.         MSPEL_FILTER13_CORE(DO_UNPACK, "movd   1", A1, A2, A3, A4)      \

  297.         NORMALIZE_MMX("$6")                                             \

  298.         TRANSFER_DO_PACK(OP)                                            \

  299.         "add       %5, %1          \n\t"                                \

  300.         "add       %5, %2          \n\t"                                \

  301.         "decl      %0              \n\t"                                \

  302.         "jnz 1b                    \n\t"                                \

  303.         : "+r"(h), "+r" (src),  "+r" (dst)                              \

  304.         : "r"(offset), "r"(3*offset), "g"(stride), "m"(rnd)             \

  305.           NAMED_CONSTRAINTS_ADD(ff_pw_53,ff_pw_18,ff_pw_3)              \

  306.         : "memory"                                                      \

  307.     );                                                                  \

  308. }

  309. 

  310. /** 1/4 shift bicubic interpolation */

  311. MSPEL_FILTER13_8B     (shift1, "0(%1,%4  )", "0(%1,%3,2)", "0(%1,%3  )", "0(%1     )", OP_PUT, put_)

  312. MSPEL_FILTER13_8B     (shift1, "0(%1,%4  )", "0(%1,%3,2)", "0(%1,%3  )", "0(%1     )", OP_AVG, avg_)

  313. MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4  )", "0(%1,%3,2)", "0(%1,%3  )", "0(%1     )")

  314. MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_)

  315. MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_)

  316. 

  317. /** 3/4 shift bicubic interpolation */

  318. MSPEL_FILTER13_8B     (shift3, "0(%1     )", "0(%1,%3  )", "0(%1,%3,2)", "0(%1,%4  )", OP_PUT, put_)

  319. MSPEL_FILTER13_8B     (shift3, "0(%1     )", "0(%1,%3  )", "0(%1,%3,2)", "0(%1,%4  )", OP_AVG, avg_)

  320. MSPEL_FILTER13_VER_16B(shift3, "0(%1     )", "0(%1,%3  )", "0(%1,%3,2)", "0(%1,%4  )")

  321. MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_)

  322. MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_)

  323. 

  324. typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift);

  325. typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd);

  326. typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_reg stride, int rnd, x86_reg offset);

  327. 

  328. /**

  329.  * Interpolate fractional pel values by applying proper vertical then

  330.  * horizontal filter.

  331.  *

  332.  * @param  dst     Destination buffer for interpolated pels.

  333.  * @param  src     Source buffer.

  334.  * @param  stride  Stride for both src and dst buffers.

  335.  * @param  hmode   Horizontal filter (expressed in quarter pixels shift).

  336.  * @param  hmode   Vertical filter.

  337.  * @param  rnd     Rounding bias.

  338.  */

  339. #define VC1_MSPEL_MC(OP, INSTR)\

  340. static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\

  341.                                int hmode, int vmode, int rnd)\

  342. {\

  343.     static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\

  344.          { NULL, vc1_put_ver_16b_shift1_mmx, ff_vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\

  345.     static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\

  346.          { NULL, OP ## vc1_hor_16b_shift1_mmx, ff_vc1_ ## OP ## hor_16b_shift2_ ## INSTR, OP ## vc1_hor_16b_shift3_mmx };\

  347.     static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\

  348.          { NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\

  349. \

  350.     __asm__ volatile(\

  351.         "pxor %%mm0, %%mm0         \n\t"\

  352.         ::: "memory"\

  353.     );\

  354. \

  355.     if (vmode) { /* Vertical filter to apply */\

  356.         if (hmode) { /* Horizontal filter to apply, output to tmp */\

  357.             static const int shift_value[] = { 0, 5, 1, 5 };\

  358.             int              shift = (shift_value[hmode]+shift_value[vmode])>>1;\

  359.             int              r;\

  360.             LOCAL_ALIGNED(16, int16_t, tmp, [12*8]);\

  361. \

  362.             r = (1<<(shift-1)) + rnd-1;\

  363.             vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\

  364. \

  365.             vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\

  366.             return;\

  367.         }\

  368.         else { /* No horizontal filter, output 8 lines to dst */\

  369.             vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\

  370.             return;\

  371.         }\

  372.     }\

  373. \

  374.     /* Horizontal mode with no vertical mode */\

  375.     vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\

  376. } \

  377. static void OP ## vc1_mspel_mc_16(uint8_t *dst, const uint8_t *src, \

  378.                                   int stride, int hmode, int vmode, int rnd)\

  379. { \

  380.     OP ## vc1_mspel_mc(dst + 0, src + 0, stride, hmode, vmode, rnd); \

  381.     OP ## vc1_mspel_mc(dst + 8, src + 8, stride, hmode, vmode, rnd); \

  382.     dst += 8*stride; src += 8*stride; \

  383.     OP ## vc1_mspel_mc(dst + 0, src + 0, stride, hmode, vmode, rnd); \

  384.     OP ## vc1_mspel_mc(dst + 8, src + 8, stride, hmode, vmode, rnd); \

  385. }

  386. 

  387. VC1_MSPEL_MC(put_, mmx)

  388. VC1_MSPEL_MC(avg_, mmxext)

  389. 

  390. /** Macro to ease bicubic filter interpolation functions declarations */

  391. #define DECLARE_FUNCTION(a, b)                                          \

  392. static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst,            \

  393.                                                const uint8_t *src,      \

  394.                                                ptrdiff_t stride,        \

  395.                                                int rnd)                 \

  396. {                                                                       \

  397.      put_vc1_mspel_mc(dst, src, stride, a, b, rnd);                     \

  398. }\

  399. static void avg_vc1_mspel_mc ## a ## b ## _mmxext(uint8_t *dst,         \

  400.                                                   const uint8_t *src,   \

  401.                                                   ptrdiff_t stride,     \

  402.                                                   int rnd)              \

  403. {                                                                       \

  404.      avg_vc1_mspel_mc(dst, src, stride, a, b, rnd);                     \

  405. }\

  406. static void put_vc1_mspel_mc ## a ## b ## _16_mmx(uint8_t *dst,         \

  407.                                                   const uint8_t *src,   \

  408.                                                   ptrdiff_t stride,     \

  409.                                                   int rnd)              \

  410. {                                                                       \

  411.      put_vc1_mspel_mc_16(dst, src, stride, a, b, rnd);                  \

  412. }\

  413. static void avg_vc1_mspel_mc ## a ## b ## _16_mmxext(uint8_t *dst,      \

  414.                                                      const uint8_t *src,\

  415.                                                      ptrdiff_t stride,  \

  416.                                                      int rnd)           \

  417. {                                                                       \

  418.      avg_vc1_mspel_mc_16(dst, src, stride, a, b, rnd);                  \

  419. }

  420. 

  421. DECLARE_FUNCTION(0, 1)

  422. DECLARE_FUNCTION(0, 2)

  423. DECLARE_FUNCTION(0, 3)

  424. 

  425. DECLARE_FUNCTION(1, 0)

  426. DECLARE_FUNCTION(1, 1)

  427. DECLARE_FUNCTION(1, 2)

  428. DECLARE_FUNCTION(1, 3)

  429. 

  430. DECLARE_FUNCTION(2, 0)

  431. DECLARE_FUNCTION(2, 1)

  432. DECLARE_FUNCTION(2, 2)

  433. DECLARE_FUNCTION(2, 3)

  434. 

  435. DECLARE_FUNCTION(3, 0)

  436. DECLARE_FUNCTION(3, 1)

  437. DECLARE_FUNCTION(3, 2)

  438. DECLARE_FUNCTION(3, 3)

  439. 

  440. #define FN_ASSIGN(OP, X, Y, INSN) \

  441.     dsp->OP##vc1_mspel_pixels_tab[1][X+4*Y] = OP##vc1_mspel_mc##X##Y##INSN; \

  442.     dsp->OP##vc1_mspel_pixels_tab[0][X+4*Y] = OP##vc1_mspel_mc##X##Y##_16##INSN

  443. 

  444. av_cold void ff_vc1dsp_init_mmx(VC1DSPContext *dsp)

  445. {

  446.     FN_ASSIGN(put_, 0, 1, _mmx);

  447.     FN_ASSIGN(put_, 0, 2, _mmx);

  448.     FN_ASSIGN(put_, 0, 3, _mmx);

  449. 

  450.     FN_ASSIGN(put_, 1, 0, _mmx);

  451.     FN_ASSIGN(put_, 1, 1, _mmx);

  452.     FN_ASSIGN(put_, 1, 2, _mmx);

  453.     FN_ASSIGN(put_, 1, 3, _mmx);

  454. 

  455.     FN_ASSIGN(put_, 2, 0, _mmx);

  456.     FN_ASSIGN(put_, 2, 1, _mmx);

  457.     FN_ASSIGN(put_, 2, 2, _mmx);

  458.     FN_ASSIGN(put_, 2, 3, _mmx);

  459. 

  460.     FN_ASSIGN(put_, 3, 0, _mmx);

  461.     FN_ASSIGN(put_, 3, 1, _mmx);

  462.     FN_ASSIGN(put_, 3, 2, _mmx);

  463.     FN_ASSIGN(put_, 3, 3, _mmx);

  464. }

  465. 

  466. av_cold void ff_vc1dsp_init_mmxext(VC1DSPContext *dsp)

  467. {

  468.     FN_ASSIGN(avg_, 0, 1, _mmxext);

  469.     FN_ASSIGN(avg_, 0, 2, _mmxext);

  470.     FN_ASSIGN(avg_, 0, 3, _mmxext);

  471. 

  472.     FN_ASSIGN(avg_, 1, 0, _mmxext);

  473.     FN_ASSIGN(avg_, 1, 1, _mmxext);

  474.     FN_ASSIGN(avg_, 1, 2, _mmxext);

  475.     FN_ASSIGN(avg_, 1, 3, _mmxext);

  476. 

  477.     FN_ASSIGN(avg_, 2, 0, _mmxext);

  478.     FN_ASSIGN(avg_, 2, 1, _mmxext);

  479.     FN_ASSIGN(avg_, 2, 2, _mmxext);

  480.     FN_ASSIGN(avg_, 2, 3, _mmxext);

  481. 

  482.     FN_ASSIGN(avg_, 3, 0, _mmxext);

  483.     FN_ASSIGN(avg_, 3, 1, _mmxext);

  484.     FN_ASSIGN(avg_, 3, 2, _mmxext);

  485.     FN_ASSIGN(avg_, 3, 3, _mmxext);

  486. }

  487. #endif /* HAVE_6REGS && HAVE_INLINE_ASM && HAVE_MMX_EXTERNAL */