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  1. ;******************************************************************************
  2. ;* x86-optimized input routines; does shuffling of packed
  3. ;* YUV formats into individual planes, and converts RGB
  4. ;* into YUV planes also.
  5. ;* Copyright (c) 2012 Ronald S. Bultje <rsbultje@gmail.com>
  6. ;*
  7. ;* This file is part of Libav.
  8. ;*
  9. ;* Libav is free software; you can redistribute it and/or
  10. ;* modify it under the terms of the GNU Lesser General Public
  11. ;* License as published by the Free Software Foundation; either
  12. ;* version 2.1 of the License, or (at your option) any later version.
  13. ;*
  14. ;* Libav is distributed in the hope that it will be useful,
  15. ;* but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. ;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. ;* Lesser General Public License for more details.
  18. ;*
  19. ;* You should have received a copy of the GNU Lesser General Public
  20. ;* License along with Libav; if not, write to the Free Software
  21. ;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  22. ;******************************************************************************
  23. %include "x86inc.asm"
  24. %include "x86util.asm"
  25. SECTION_RODATA
  26. %define RY 0x20DE
  27. %define GY 0x4087
  28. %define BY 0x0C88
  29. %define RU 0xECFF
  30. %define GU 0xDAC8
  31. %define BU 0x3838
  32. %define RV 0x3838
  33. %define GV 0xD0E3
  34. %define BV 0xF6E4
  35. rgb_Yrnd: times 4 dd 0x84000 ; 16.5 << 15
  36. rgb_UVrnd: times 4 dd 0x404000 ; 128.5 << 15
  37. bgr_Ycoeff_12x4: times 2 dw BY, GY, 0, BY
  38. bgr_Ycoeff_3x56: times 2 dw RY, 0, GY, RY
  39. rgb_Ycoeff_12x4: times 2 dw RY, GY, 0, RY
  40. rgb_Ycoeff_3x56: times 2 dw BY, 0, GY, BY
  41. bgr_Ucoeff_12x4: times 2 dw BU, GU, 0, BU
  42. bgr_Ucoeff_3x56: times 2 dw RU, 0, GU, RU
  43. rgb_Ucoeff_12x4: times 2 dw RU, GU, 0, RU
  44. rgb_Ucoeff_3x56: times 2 dw BU, 0, GU, BU
  45. bgr_Vcoeff_12x4: times 2 dw BV, GV, 0, BV
  46. bgr_Vcoeff_3x56: times 2 dw RV, 0, GV, RV
  47. rgb_Vcoeff_12x4: times 2 dw RV, GV, 0, RV
  48. rgb_Vcoeff_3x56: times 2 dw BV, 0, GV, BV
  49. rgba_Ycoeff_rb: times 4 dw RY, BY
  50. rgba_Ycoeff_br: times 4 dw BY, RY
  51. rgba_Ycoeff_ga: times 4 dw GY, 0
  52. rgba_Ycoeff_ag: times 4 dw 0, GY
  53. rgba_Ucoeff_rb: times 4 dw RU, BU
  54. rgba_Ucoeff_br: times 4 dw BU, RU
  55. rgba_Ucoeff_ga: times 4 dw GU, 0
  56. rgba_Ucoeff_ag: times 4 dw 0, GU
  57. rgba_Vcoeff_rb: times 4 dw RV, BV
  58. rgba_Vcoeff_br: times 4 dw BV, RV
  59. rgba_Vcoeff_ga: times 4 dw GV, 0
  60. rgba_Vcoeff_ag: times 4 dw 0, GV
  61. shuf_rgb_12x4: db 0, 0x80, 1, 0x80, 2, 0x80, 3, 0x80, \
  62. 6, 0x80, 7, 0x80, 8, 0x80, 9, 0x80
  63. shuf_rgb_3x56: db 2, 0x80, 3, 0x80, 4, 0x80, 5, 0x80, \
  64. 8, 0x80, 9, 0x80, 10, 0x80, 11, 0x80
  65. SECTION .text
  66. ;-----------------------------------------------------------------------------
  67. ; RGB to Y/UV.
  68. ;
  69. ; void <fmt>ToY_<opt>(uint8_t *dst, const uint8_t *src, int w);
  70. ; and
  71. ; void <fmt>toUV_<opt>(uint8_t *dstU, uint8_t *dstV, const uint8_t *src,
  72. ; const uint8_t *unused, int w);
  73. ;-----------------------------------------------------------------------------
  74. ; %1 = nr. of XMM registers
  75. ; %2 = rgb or bgr
  76. %macro RGB24_TO_Y_FN 2-3
  77. cglobal %2 %+ 24ToY, 3, 3, %1, dst, src, w
  78. %if mmsize == 8
  79. mova m5, [%2_Ycoeff_12x4]
  80. mova m6, [%2_Ycoeff_3x56]
  81. %define coeff1 m5
  82. %define coeff2 m6
  83. %elif ARCH_X86_64
  84. mova m8, [%2_Ycoeff_12x4]
  85. mova m9, [%2_Ycoeff_3x56]
  86. %define coeff1 m8
  87. %define coeff2 m9
  88. %else ; x86-32 && mmsize == 16
  89. %define coeff1 [%2_Ycoeff_12x4]
  90. %define coeff2 [%2_Ycoeff_3x56]
  91. %endif ; x86-32/64 && mmsize == 8/16
  92. %if (ARCH_X86_64 || mmsize == 8) && %0 == 3
  93. jmp mangle(program_name %+ _ %+ %3 %+ 24ToY %+ SUFFIX).body
  94. %else ; (ARCH_X86_64 && %0 == 3) || mmsize == 8
  95. .body:
  96. %if cpuflag(ssse3)
  97. mova m7, [shuf_rgb_12x4]
  98. %define shuf_rgb1 m7
  99. %if ARCH_X86_64
  100. mova m10, [shuf_rgb_3x56]
  101. %define shuf_rgb2 m10
  102. %else ; x86-32
  103. %define shuf_rgb2 [shuf_rgb_3x56]
  104. %endif ; x86-32/64
  105. %endif ; cpuflag(ssse3)
  106. %if ARCH_X86_64
  107. movsxd wq, wd
  108. %endif
  109. add dstq, wq
  110. neg wq
  111. %if notcpuflag(ssse3)
  112. pxor m7, m7
  113. %endif ; !cpuflag(ssse3)
  114. mova m4, [rgb_Yrnd]
  115. .loop:
  116. %if cpuflag(ssse3)
  117. movu m0, [srcq+0] ; (byte) { Bx, Gx, Rx }[0-3]
  118. movu m2, [srcq+12] ; (byte) { Bx, Gx, Rx }[4-7]
  119. pshufb m1, m0, shuf_rgb2 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
  120. pshufb m0, shuf_rgb1 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
  121. pshufb m3, m2, shuf_rgb2 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
  122. pshufb m2, shuf_rgb1 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
  123. %else ; !cpuflag(ssse3)
  124. movd m0, [srcq+0] ; (byte) { B0, G0, R0, B1 }
  125. movd m1, [srcq+2] ; (byte) { R0, B1, G1, R1 }
  126. movd m2, [srcq+6] ; (byte) { B2, G2, R2, B3 }
  127. movd m3, [srcq+8] ; (byte) { R2, B3, G3, R3 }
  128. %if mmsize == 16 ; i.e. sse2
  129. punpckldq m0, m2 ; (byte) { B0, G0, R0, B1, B2, G2, R2, B3 }
  130. punpckldq m1, m3 ; (byte) { R0, B1, G1, R1, R2, B3, G3, R3 }
  131. movd m2, [srcq+12] ; (byte) { B4, G4, R4, B5 }
  132. movd m3, [srcq+14] ; (byte) { R4, B5, G5, R5 }
  133. movd m5, [srcq+18] ; (byte) { B6, G6, R6, B7 }
  134. movd m6, [srcq+20] ; (byte) { R6, B7, G7, R7 }
  135. punpckldq m2, m5 ; (byte) { B4, G4, R4, B5, B6, G6, R6, B7 }
  136. punpckldq m3, m6 ; (byte) { R4, B5, G5, R5, R6, B7, G7, R7 }
  137. %endif ; mmsize == 16
  138. punpcklbw m0, m7 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
  139. punpcklbw m1, m7 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
  140. punpcklbw m2, m7 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
  141. punpcklbw m3, m7 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
  142. %endif ; cpuflag(ssse3)
  143. add srcq, 3 * mmsize / 2
  144. pmaddwd m0, coeff1 ; (dword) { B0*BY + G0*GY, B1*BY, B2*BY + G2*GY, B3*BY }
  145. pmaddwd m1, coeff2 ; (dword) { R0*RY, G1+GY + R1*RY, R2*RY, G3+GY + R3*RY }
  146. pmaddwd m2, coeff1 ; (dword) { B4*BY + G4*GY, B5*BY, B6*BY + G6*GY, B7*BY }
  147. pmaddwd m3, coeff2 ; (dword) { R4*RY, G5+GY + R5*RY, R6*RY, G7+GY + R7*RY }
  148. paddd m0, m1 ; (dword) { Bx*BY + Gx*GY + Rx*RY }[0-3]
  149. paddd m2, m3 ; (dword) { Bx*BY + Gx*GY + Rx*RY }[4-7]
  150. paddd m0, m4 ; += rgb_Yrnd, i.e. (dword) { Y[0-3] }
  151. paddd m2, m4 ; += rgb_Yrnd, i.e. (dword) { Y[4-7] }
  152. psrad m0, 15
  153. psrad m2, 15
  154. packssdw m0, m2 ; (word) { Y[0-7] }
  155. packuswb m0, m0 ; (byte) { Y[0-7] }
  156. movh [dstq+wq], m0
  157. add wq, mmsize / 2
  158. jl .loop
  159. REP_RET
  160. %endif ; (ARCH_X86_64 && %0 == 3) || mmsize == 8
  161. %endmacro
  162. ; %1 = nr. of XMM registers
  163. ; %2 = rgb or bgr
  164. %macro RGB24_TO_UV_FN 2-3
  165. cglobal %2 %+ 24ToUV, 3, 4, %1, dstU, dstV, src, w
  166. %if ARCH_X86_64
  167. mova m8, [%2_Ucoeff_12x4]
  168. mova m9, [%2_Ucoeff_3x56]
  169. mova m10, [%2_Vcoeff_12x4]
  170. mova m11, [%2_Vcoeff_3x56]
  171. %define coeffU1 m8
  172. %define coeffU2 m9
  173. %define coeffV1 m10
  174. %define coeffV2 m11
  175. %else ; x86-32
  176. %define coeffU1 [%2_Ucoeff_12x4]
  177. %define coeffU2 [%2_Ucoeff_3x56]
  178. %define coeffV1 [%2_Vcoeff_12x4]
  179. %define coeffV2 [%2_Vcoeff_3x56]
  180. %endif ; x86-32/64
  181. %if ARCH_X86_64 && %0 == 3
  182. jmp mangle(program_name %+ _ %+ %3 %+ 24ToUV %+ SUFFIX).body
  183. %else ; ARCH_X86_64 && %0 == 3
  184. .body:
  185. %if cpuflag(ssse3)
  186. mova m7, [shuf_rgb_12x4]
  187. %define shuf_rgb1 m7
  188. %if ARCH_X86_64
  189. mova m12, [shuf_rgb_3x56]
  190. %define shuf_rgb2 m12
  191. %else ; x86-32
  192. %define shuf_rgb2 [shuf_rgb_3x56]
  193. %endif ; x86-32/64
  194. %endif ; cpuflag(ssse3)
  195. %if ARCH_X86_64
  196. movsxd wq, dword r4m
  197. %else ; x86-32
  198. mov wq, r4m
  199. %endif
  200. add dstUq, wq
  201. add dstVq, wq
  202. neg wq
  203. mova m6, [rgb_UVrnd]
  204. %if notcpuflag(ssse3)
  205. pxor m7, m7
  206. %endif
  207. .loop:
  208. %if cpuflag(ssse3)
  209. movu m0, [srcq+0] ; (byte) { Bx, Gx, Rx }[0-3]
  210. movu m4, [srcq+12] ; (byte) { Bx, Gx, Rx }[4-7]
  211. pshufb m1, m0, shuf_rgb2 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
  212. pshufb m0, shuf_rgb1 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
  213. %else ; !cpuflag(ssse3)
  214. movd m0, [srcq+0] ; (byte) { B0, G0, R0, B1 }
  215. movd m1, [srcq+2] ; (byte) { R0, B1, G1, R1 }
  216. movd m4, [srcq+6] ; (byte) { B2, G2, R2, B3 }
  217. movd m5, [srcq+8] ; (byte) { R2, B3, G3, R3 }
  218. %if mmsize == 16
  219. punpckldq m0, m4 ; (byte) { B0, G0, R0, B1, B2, G2, R2, B3 }
  220. punpckldq m1, m5 ; (byte) { R0, B1, G1, R1, R2, B3, G3, R3 }
  221. movd m4, [srcq+12] ; (byte) { B4, G4, R4, B5 }
  222. movd m5, [srcq+14] ; (byte) { R4, B5, G5, R5 }
  223. %endif ; mmsize == 16
  224. punpcklbw m0, m7 ; (word) { B0, G0, R0, B1, B2, G2, R2, B3 }
  225. punpcklbw m1, m7 ; (word) { R0, B1, G1, R1, R2, B3, G3, R3 }
  226. %endif ; cpuflag(ssse3)
  227. pmaddwd m2, m0, coeffV1 ; (dword) { B0*BV + G0*GV, B1*BV, B2*BV + G2*GV, B3*BV }
  228. pmaddwd m3, m1, coeffV2 ; (dword) { R0*BV, G1*GV + R1*BV, R2*BV, G3*GV + R3*BV }
  229. pmaddwd m0, coeffU1 ; (dword) { B0*BU + G0*GU, B1*BU, B2*BU + G2*GU, B3*BU }
  230. pmaddwd m1, coeffU2 ; (dword) { R0*BU, G1*GU + R1*BU, R2*BU, G3*GU + R3*BU }
  231. paddd m0, m1 ; (dword) { Bx*BU + Gx*GU + Rx*RU }[0-3]
  232. paddd m2, m3 ; (dword) { Bx*BV + Gx*GV + Rx*RV }[0-3]
  233. %if cpuflag(ssse3)
  234. pshufb m5, m4, shuf_rgb2 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
  235. pshufb m4, shuf_rgb1 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
  236. %else ; !cpuflag(ssse3)
  237. %if mmsize == 16
  238. movd m1, [srcq+18] ; (byte) { B6, G6, R6, B7 }
  239. movd m3, [srcq+20] ; (byte) { R6, B7, G7, R7 }
  240. punpckldq m4, m1 ; (byte) { B4, G4, R4, B5, B6, G6, R6, B7 }
  241. punpckldq m5, m3 ; (byte) { R4, B5, G5, R5, R6, B7, G7, R7 }
  242. %endif ; mmsize == 16 && !cpuflag(ssse3)
  243. punpcklbw m4, m7 ; (word) { B4, G4, R4, B5, B6, G6, R6, B7 }
  244. punpcklbw m5, m7 ; (word) { R4, B5, G5, R5, R6, B7, G7, R7 }
  245. %endif ; cpuflag(ssse3)
  246. add srcq, 3 * mmsize / 2
  247. pmaddwd m1, m4, coeffU1 ; (dword) { B4*BU + G4*GU, B5*BU, B6*BU + G6*GU, B7*BU }
  248. pmaddwd m3, m5, coeffU2 ; (dword) { R4*BU, G5*GU + R5*BU, R6*BU, G7*GU + R7*BU }
  249. pmaddwd m4, coeffV1 ; (dword) { B4*BV + G4*GV, B5*BV, B6*BV + G6*GV, B7*BV }
  250. pmaddwd m5, coeffV2 ; (dword) { R4*BV, G5*GV + R5*BV, R6*BV, G7*GV + R7*BV }
  251. paddd m1, m3 ; (dword) { Bx*BU + Gx*GU + Rx*RU }[4-7]
  252. paddd m4, m5 ; (dword) { Bx*BV + Gx*GV + Rx*RV }[4-7]
  253. paddd m0, m6 ; += rgb_UVrnd, i.e. (dword) { U[0-3] }
  254. paddd m2, m6 ; += rgb_UVrnd, i.e. (dword) { V[0-3] }
  255. paddd m1, m6 ; += rgb_UVrnd, i.e. (dword) { U[4-7] }
  256. paddd m4, m6 ; += rgb_UVrnd, i.e. (dword) { V[4-7] }
  257. psrad m0, 15
  258. psrad m2, 15
  259. psrad m1, 15
  260. psrad m4, 15
  261. packssdw m0, m1 ; (word) { U[0-7] }
  262. packssdw m2, m4 ; (word) { V[0-7] }
  263. %if mmsize == 8
  264. packuswb m0, m0 ; (byte) { U[0-3] }
  265. packuswb m2, m2 ; (byte) { V[0-3] }
  266. movh [dstUq+wq], m0
  267. movh [dstVq+wq], m2
  268. %else ; mmsize == 16
  269. packuswb m0, m2 ; (byte) { U[0-7], V[0-7] }
  270. movh [dstUq+wq], m0
  271. movhps [dstVq+wq], m0
  272. %endif ; mmsize == 8/16
  273. add wq, mmsize / 2
  274. jl .loop
  275. REP_RET
  276. %endif ; ARCH_X86_64 && %0 == 3
  277. %endmacro
  278. ; %1 = nr. of XMM registers for rgb-to-Y func
  279. ; %2 = nr. of XMM registers for rgb-to-UV func
  280. %macro RGB24_FUNCS 2
  281. RGB24_TO_Y_FN %1, rgb
  282. RGB24_TO_Y_FN %1, bgr, rgb
  283. RGB24_TO_UV_FN %2, rgb
  284. RGB24_TO_UV_FN %2, bgr, rgb
  285. %endmacro
  286. %if ARCH_X86_32
  287. INIT_MMX mmx
  288. RGB24_FUNCS 0, 0
  289. %endif
  290. INIT_XMM sse2
  291. RGB24_FUNCS 10, 12
  292. INIT_XMM ssse3
  293. RGB24_FUNCS 11, 13
  294. INIT_XMM avx
  295. RGB24_FUNCS 11, 13
  296. ; %1 = nr. of XMM registers
  297. ; %2-5 = rgba, bgra, argb or abgr (in individual characters)
  298. %macro RGB32_TO_Y_FN 5-6
  299. cglobal %2%3%4%5 %+ ToY, 3, 3, %1, dst, src, w
  300. mova m5, [rgba_Ycoeff_%2%4]
  301. mova m6, [rgba_Ycoeff_%3%5]
  302. %if %0 == 6
  303. jmp mangle(program_name %+ _ %+ %6 %+ ToY %+ SUFFIX).body
  304. %else ; %0 == 6
  305. .body:
  306. %if ARCH_X86_64
  307. movsxd wq, wd
  308. %endif
  309. lea srcq, [srcq+wq*4]
  310. add dstq, wq
  311. neg wq
  312. mova m4, [rgb_Yrnd]
  313. pcmpeqb m7, m7
  314. psrlw m7, 8 ; (word) { 0x00ff } x4
  315. .loop:
  316. ; FIXME check alignment and use mova
  317. movu m0, [srcq+wq*4+0] ; (byte) { Bx, Gx, Rx, xx }[0-3]
  318. movu m2, [srcq+wq*4+mmsize] ; (byte) { Bx, Gx, Rx, xx }[4-7]
  319. DEINTB 1, 0, 3, 2, 7 ; (word) { Gx, xx (m0/m2) or Bx, Rx (m1/m3) }[0-3]/[4-7]
  320. pmaddwd m1, m5 ; (dword) { Bx*BY + Rx*RY }[0-3]
  321. pmaddwd m0, m6 ; (dword) { Gx*GY }[0-3]
  322. pmaddwd m3, m5 ; (dword) { Bx*BY + Rx*RY }[4-7]
  323. pmaddwd m2, m6 ; (dword) { Gx*GY }[4-7]
  324. paddd m0, m4 ; += rgb_Yrnd
  325. paddd m2, m4 ; += rgb_Yrnd
  326. paddd m0, m1 ; (dword) { Y[0-3] }
  327. paddd m2, m3 ; (dword) { Y[4-7] }
  328. psrad m0, 15
  329. psrad m2, 15
  330. packssdw m0, m2 ; (word) { Y[0-7] }
  331. packuswb m0, m0 ; (byte) { Y[0-7] }
  332. movh [dstq+wq], m0
  333. add wq, mmsize / 2
  334. jl .loop
  335. REP_RET
  336. %endif ; %0 == 3
  337. %endmacro
  338. ; %1 = nr. of XMM registers
  339. ; %2-5 = rgba, bgra, argb or abgr (in individual characters)
  340. %macro RGB32_TO_UV_FN 5-6
  341. cglobal %2%3%4%5 %+ ToUV, 3, 4, %1, dstU, dstV, src, w
  342. %if ARCH_X86_64
  343. mova m8, [rgba_Ucoeff_%2%4]
  344. mova m9, [rgba_Ucoeff_%3%5]
  345. mova m10, [rgba_Vcoeff_%2%4]
  346. mova m11, [rgba_Vcoeff_%3%5]
  347. %define coeffU1 m8
  348. %define coeffU2 m9
  349. %define coeffV1 m10
  350. %define coeffV2 m11
  351. %else ; x86-32
  352. %define coeffU1 [rgba_Ucoeff_%2%4]
  353. %define coeffU2 [rgba_Ucoeff_%3%5]
  354. %define coeffV1 [rgba_Vcoeff_%2%4]
  355. %define coeffV2 [rgba_Vcoeff_%3%5]
  356. %endif ; x86-64/32
  357. %if ARCH_X86_64 && %0 == 6
  358. jmp mangle(program_name %+ _ %+ %6 %+ ToUV %+ SUFFIX).body
  359. %else ; ARCH_X86_64 && %0 == 6
  360. .body:
  361. %if ARCH_X86_64
  362. movsxd wq, dword r4m
  363. %else ; x86-32
  364. mov wq, r4m
  365. %endif
  366. add dstUq, wq
  367. add dstVq, wq
  368. lea srcq, [srcq+wq*4]
  369. neg wq
  370. pcmpeqb m7, m7
  371. psrlw m7, 8 ; (word) { 0x00ff } x4
  372. mova m6, [rgb_UVrnd]
  373. .loop:
  374. ; FIXME check alignment and use mova
  375. movu m0, [srcq+wq*4+0] ; (byte) { Bx, Gx, Rx, xx }[0-3]
  376. movu m4, [srcq+wq*4+mmsize] ; (byte) { Bx, Gx, Rx, xx }[4-7]
  377. DEINTB 1, 0, 5, 4, 7 ; (word) { Gx, xx (m0/m4) or Bx, Rx (m1/m5) }[0-3]/[4-7]
  378. pmaddwd m3, m1, coeffV1 ; (dword) { Bx*BV + Rx*RV }[0-3]
  379. pmaddwd m2, m0, coeffV2 ; (dword) { Gx*GV }[0-3]
  380. pmaddwd m1, coeffU1 ; (dword) { Bx*BU + Rx*RU }[0-3]
  381. pmaddwd m0, coeffU2 ; (dword) { Gx*GU }[0-3]
  382. paddd m3, m6 ; += rgb_UVrnd
  383. paddd m1, m6 ; += rgb_UVrnd
  384. paddd m2, m3 ; (dword) { V[0-3] }
  385. paddd m0, m1 ; (dword) { U[0-3] }
  386. pmaddwd m3, m5, coeffV1 ; (dword) { Bx*BV + Rx*RV }[4-7]
  387. pmaddwd m1, m4, coeffV2 ; (dword) { Gx*GV }[4-7]
  388. pmaddwd m5, coeffU1 ; (dword) { Bx*BU + Rx*RU }[4-7]
  389. pmaddwd m4, coeffU2 ; (dword) { Gx*GU }[4-7]
  390. paddd m3, m6 ; += rgb_UVrnd
  391. paddd m5, m6 ; += rgb_UVrnd
  392. psrad m0, 15
  393. paddd m1, m3 ; (dword) { V[4-7] }
  394. paddd m4, m5 ; (dword) { U[4-7] }
  395. psrad m2, 15
  396. psrad m4, 15
  397. psrad m1, 15
  398. packssdw m0, m4 ; (word) { U[0-7] }
  399. packssdw m2, m1 ; (word) { V[0-7] }
  400. %if mmsize == 8
  401. packuswb m0, m0 ; (byte) { U[0-7] }
  402. packuswb m2, m2 ; (byte) { V[0-7] }
  403. movh [dstUq+wq], m0
  404. movh [dstVq+wq], m2
  405. %else ; mmsize == 16
  406. packuswb m0, m2 ; (byte) { U[0-7], V[0-7] }
  407. movh [dstUq+wq], m0
  408. movhps [dstVq+wq], m0
  409. %endif ; mmsize == 8/16
  410. add wq, mmsize / 2
  411. jl .loop
  412. REP_RET
  413. %endif ; ARCH_X86_64 && %0 == 3
  414. %endmacro
  415. ; %1 = nr. of XMM registers for rgb-to-Y func
  416. ; %2 = nr. of XMM registers for rgb-to-UV func
  417. %macro RGB32_FUNCS 2
  418. RGB32_TO_Y_FN %1, r, g, b, a
  419. RGB32_TO_Y_FN %1, b, g, r, a, rgba
  420. RGB32_TO_Y_FN %1, a, r, g, b, rgba
  421. RGB32_TO_Y_FN %1, a, b, g, r, rgba
  422. RGB32_TO_UV_FN %2, r, g, b, a
  423. RGB32_TO_UV_FN %2, b, g, r, a, rgba
  424. RGB32_TO_UV_FN %2, a, r, g, b, rgba
  425. RGB32_TO_UV_FN %2, a, b, g, r, rgba
  426. %endmacro
  427. %if ARCH_X86_32
  428. INIT_MMX mmx
  429. RGB32_FUNCS 0, 0
  430. %endif
  431. INIT_XMM sse2
  432. RGB32_FUNCS 8, 12
  433. INIT_XMM avx
  434. RGB32_FUNCS 8, 12
  435. ;-----------------------------------------------------------------------------
  436. ; YUYV/UYVY/NV12/NV21 packed pixel shuffling.
  437. ;
  438. ; void <fmt>ToY_<opt>(uint8_t *dst, const uint8_t *src, int w);
  439. ; and
  440. ; void <fmt>toUV_<opt>(uint8_t *dstU, uint8_t *dstV, const uint8_t *src,
  441. ; const uint8_t *unused, int w);
  442. ;-----------------------------------------------------------------------------
  443. ; %1 = a (aligned) or u (unaligned)
  444. ; %2 = yuyv or uyvy
  445. %macro LOOP_YUYV_TO_Y 2
  446. .loop_%1:
  447. mov%1 m0, [srcq+wq*2] ; (byte) { Y0, U0, Y1, V0, ... }
  448. mov%1 m1, [srcq+wq*2+mmsize] ; (byte) { Y8, U4, Y9, V4, ... }
  449. %ifidn %2, yuyv
  450. pand m0, m2 ; (word) { Y0, Y1, ..., Y7 }
  451. pand m1, m2 ; (word) { Y8, Y9, ..., Y15 }
  452. %else ; uyvy
  453. psrlw m0, 8 ; (word) { Y0, Y1, ..., Y7 }
  454. psrlw m1, 8 ; (word) { Y8, Y9, ..., Y15 }
  455. %endif ; yuyv/uyvy
  456. packuswb m0, m1 ; (byte) { Y0, ..., Y15 }
  457. mova [dstq+wq], m0
  458. add wq, mmsize
  459. jl .loop_%1
  460. REP_RET
  461. %endmacro
  462. ; %1 = nr. of XMM registers
  463. ; %2 = yuyv or uyvy
  464. ; %3 = if specified, it means that unaligned and aligned code in loop
  465. ; will be the same (i.e. YUYV+AVX), and thus we don't need to
  466. ; split the loop in an aligned and unaligned case
  467. %macro YUYV_TO_Y_FN 2-3
  468. cglobal %2ToY, 3, 3, %1, dst, src, w
  469. %if ARCH_X86_64
  470. movsxd wq, wd
  471. %endif
  472. add dstq, wq
  473. %if mmsize == 16
  474. test srcq, 15
  475. %endif
  476. lea srcq, [srcq+wq*2]
  477. %ifidn %2, yuyv
  478. pcmpeqb m2, m2 ; (byte) { 0xff } x 16
  479. psrlw m2, 8 ; (word) { 0x00ff } x 8
  480. %endif ; yuyv
  481. %if mmsize == 16
  482. jnz .loop_u_start
  483. neg wq
  484. LOOP_YUYV_TO_Y a, %2
  485. .loop_u_start:
  486. neg wq
  487. LOOP_YUYV_TO_Y u, %2
  488. %else ; mmsize == 8
  489. neg wq
  490. LOOP_YUYV_TO_Y a, %2
  491. %endif ; mmsize == 8/16
  492. %endmacro
  493. ; %1 = a (aligned) or u (unaligned)
  494. ; %2 = yuyv or uyvy
  495. %macro LOOP_YUYV_TO_UV 2
  496. .loop_%1:
  497. %ifidn %2, yuyv
  498. mov%1 m0, [srcq+wq*4] ; (byte) { Y0, U0, Y1, V0, ... }
  499. mov%1 m1, [srcq+wq*4+mmsize] ; (byte) { Y8, U4, Y9, V4, ... }
  500. psrlw m0, 8 ; (word) { U0, V0, ..., U3, V3 }
  501. psrlw m1, 8 ; (word) { U4, V4, ..., U7, V7 }
  502. %else ; uyvy
  503. %if cpuflag(avx)
  504. vpand m0, m2, [srcq+wq*4] ; (word) { U0, V0, ..., U3, V3 }
  505. vpand m1, m2, [srcq+wq*4+mmsize] ; (word) { U4, V4, ..., U7, V7 }
  506. %else
  507. mov%1 m0, [srcq+wq*4] ; (byte) { Y0, U0, Y1, V0, ... }
  508. mov%1 m1, [srcq+wq*4+mmsize] ; (byte) { Y8, U4, Y9, V4, ... }
  509. pand m0, m2 ; (word) { U0, V0, ..., U3, V3 }
  510. pand m1, m2 ; (word) { U4, V4, ..., U7, V7 }
  511. %endif
  512. %endif ; yuyv/uyvy
  513. packuswb m0, m1 ; (byte) { U0, V0, ..., U7, V7 }
  514. pand m1, m0, m2 ; (word) { U0, U1, ..., U7 }
  515. psrlw m0, 8 ; (word) { V0, V1, ..., V7 }
  516. %if mmsize == 16
  517. packuswb m1, m0 ; (byte) { U0, ... U7, V1, ... V7 }
  518. movh [dstUq+wq], m1
  519. movhps [dstVq+wq], m1
  520. %else ; mmsize == 8
  521. packuswb m1, m1 ; (byte) { U0, ... U3 }
  522. packuswb m0, m0 ; (byte) { V0, ... V3 }
  523. movh [dstUq+wq], m1
  524. movh [dstVq+wq], m0
  525. %endif ; mmsize == 8/16
  526. add wq, mmsize / 2
  527. jl .loop_%1
  528. REP_RET
  529. %endmacro
  530. ; %1 = nr. of XMM registers
  531. ; %2 = yuyv or uyvy
  532. ; %3 = if specified, it means that unaligned and aligned code in loop
  533. ; will be the same (i.e. UYVY+AVX), and thus we don't need to
  534. ; split the loop in an aligned and unaligned case
  535. %macro YUYV_TO_UV_FN 2-3
  536. cglobal %2ToUV, 3, 4, %1, dstU, dstV, src, w
  537. %if ARCH_X86_64
  538. movsxd wq, dword r4m
  539. %else ; x86-32
  540. mov wq, r4m
  541. %endif
  542. add dstUq, wq
  543. add dstVq, wq
  544. %if mmsize == 16 && %0 == 2
  545. test srcq, 15
  546. %endif
  547. lea srcq, [srcq+wq*4]
  548. pcmpeqb m2, m2 ; (byte) { 0xff } x 16
  549. psrlw m2, 8 ; (word) { 0x00ff } x 8
  550. ; NOTE: if uyvy+avx, u/a are identical
  551. %if mmsize == 16 && %0 == 2
  552. jnz .loop_u_start
  553. neg wq
  554. LOOP_YUYV_TO_UV a, %2
  555. .loop_u_start:
  556. neg wq
  557. LOOP_YUYV_TO_UV u, %2
  558. %else ; mmsize == 8
  559. neg wq
  560. LOOP_YUYV_TO_UV a, %2
  561. %endif ; mmsize == 8/16
  562. %endmacro
  563. ; %1 = a (aligned) or u (unaligned)
  564. ; %2 = nv12 or nv21
  565. %macro LOOP_NVXX_TO_UV 2
  566. .loop_%1:
  567. mov%1 m0, [srcq+wq*2] ; (byte) { U0, V0, U1, V1, ... }
  568. mov%1 m1, [srcq+wq*2+mmsize] ; (byte) { U8, V8, U9, V9, ... }
  569. pand m2, m0, m4 ; (word) { U0, U1, ..., U7 }
  570. pand m3, m1, m4 ; (word) { U8, U9, ..., U15 }
  571. psrlw m0, 8 ; (word) { V0, V1, ..., V7 }
  572. psrlw m1, 8 ; (word) { V8, V9, ..., V15 }
  573. packuswb m2, m3 ; (byte) { U0, ..., U15 }
  574. packuswb m0, m1 ; (byte) { V0, ..., V15 }
  575. %ifidn %2, nv12
  576. mova [dstUq+wq], m2
  577. mova [dstVq+wq], m0
  578. %else ; nv21
  579. mova [dstVq+wq], m2
  580. mova [dstUq+wq], m0
  581. %endif ; nv12/21
  582. add wq, mmsize
  583. jl .loop_%1
  584. REP_RET
  585. %endmacro
  586. ; %1 = nr. of XMM registers
  587. ; %2 = nv12 or nv21
  588. %macro NVXX_TO_UV_FN 2
  589. cglobal %2ToUV, 3, 4, %1, dstU, dstV, src, w
  590. %if ARCH_X86_64
  591. movsxd wq, dword r4m
  592. %else ; x86-32
  593. mov wq, r4m
  594. %endif
  595. add dstUq, wq
  596. add dstVq, wq
  597. %if mmsize == 16
  598. test srcq, 15
  599. %endif
  600. lea srcq, [srcq+wq*2]
  601. pcmpeqb m4, m4 ; (byte) { 0xff } x 16
  602. psrlw m4, 8 ; (word) { 0x00ff } x 8
  603. %if mmsize == 16
  604. jnz .loop_u_start
  605. neg wq
  606. LOOP_NVXX_TO_UV a, %2
  607. .loop_u_start:
  608. neg wq
  609. LOOP_NVXX_TO_UV u, %2
  610. %else ; mmsize == 8
  611. neg wq
  612. LOOP_NVXX_TO_UV a, %2
  613. %endif ; mmsize == 8/16
  614. %endmacro
  615. %if ARCH_X86_32
  616. INIT_MMX mmx
  617. YUYV_TO_Y_FN 0, yuyv
  618. YUYV_TO_Y_FN 0, uyvy
  619. YUYV_TO_UV_FN 0, yuyv
  620. YUYV_TO_UV_FN 0, uyvy
  621. NVXX_TO_UV_FN 0, nv12
  622. NVXX_TO_UV_FN 0, nv21
  623. %endif
  624. INIT_XMM sse2
  625. YUYV_TO_Y_FN 3, yuyv
  626. YUYV_TO_Y_FN 2, uyvy
  627. YUYV_TO_UV_FN 3, yuyv
  628. YUYV_TO_UV_FN 3, uyvy
  629. NVXX_TO_UV_FN 5, nv12
  630. NVXX_TO_UV_FN 5, nv21
  631. INIT_XMM avx
  632. ; in theory, we could write a yuy2-to-y using vpand (i.e. AVX), but
  633. ; that's not faster in practice
  634. YUYV_TO_UV_FN 3, yuyv
  635. YUYV_TO_UV_FN 3, uyvy, 1
  636. NVXX_TO_UV_FN 5, nv12
  637. NVXX_TO_UV_FN 5, nv21