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  1. ;*****************************************************************************
  2. ;* x86inc.asm: x264asm abstraction layer
  3. ;*****************************************************************************
  4. ;* Copyright (C) 2005-2012 x264 project
  5. ;*
  6. ;* Authors: Loren Merritt <lorenm@u.washington.edu>
  7. ;* Anton Mitrofanov <BugMaster@narod.ru>
  8. ;* Jason Garrett-Glaser <darkshikari@gmail.com>
  9. ;* Henrik Gramner <hengar-6@student.ltu.se>
  10. ;*
  11. ;* Permission to use, copy, modify, and/or distribute this software for any
  12. ;* purpose with or without fee is hereby granted, provided that the above
  13. ;* copyright notice and this permission notice appear in all copies.
  14. ;*
  15. ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  16. ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  17. ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  18. ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  19. ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  20. ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  21. ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  22. ;*****************************************************************************
  23. ; This is a header file for the x264ASM assembly language, which uses
  24. ; NASM/YASM syntax combined with a large number of macros to provide easy
  25. ; abstraction between different calling conventions (x86_32, win64, linux64).
  26. ; It also has various other useful features to simplify writing the kind of
  27. ; DSP functions that are most often used in x264.
  28. ; Unlike the rest of x264, this file is available under an ISC license, as it
  29. ; has significant usefulness outside of x264 and we want it to be available
  30. ; to the largest audience possible. Of course, if you modify it for your own
  31. ; purposes to add a new feature, we strongly encourage contributing a patch
  32. ; as this feature might be useful for others as well. Send patches or ideas
  33. ; to x264-devel@videolan.org .
  34. %define program_name ff
  35. %define UNIX64 0
  36. %define WIN64 0
  37. %if ARCH_X86_64
  38. %ifidn __OUTPUT_FORMAT__,win32
  39. %define WIN64 1
  40. %elifidn __OUTPUT_FORMAT__,win64
  41. %define WIN64 1
  42. %else
  43. %define UNIX64 1
  44. %endif
  45. %endif
  46. %ifdef PREFIX
  47. %define mangle(x) _ %+ x
  48. %else
  49. %define mangle(x) x
  50. %endif
  51. ; FIXME: All of the 64bit asm functions that take a stride as an argument
  52. ; via register, assume that the high dword of that register is filled with 0.
  53. ; This is true in practice (since we never do any 64bit arithmetic on strides,
  54. ; and x264's strides are all positive), but is not guaranteed by the ABI.
  55. ; Name of the .rodata section.
  56. ; Kludge: Something on OS X fails to align .rodata even given an align attribute,
  57. ; so use a different read-only section.
  58. %macro SECTION_RODATA 0-1 16
  59. %ifidn __OUTPUT_FORMAT__,macho64
  60. SECTION .text align=%1
  61. %elifidn __OUTPUT_FORMAT__,macho
  62. SECTION .text align=%1
  63. fakegot:
  64. %elifidn __OUTPUT_FORMAT__,aout
  65. section .text
  66. %else
  67. SECTION .rodata align=%1
  68. %endif
  69. %endmacro
  70. ; aout does not support align=
  71. %macro SECTION_TEXT 0-1 16
  72. %ifidn __OUTPUT_FORMAT__,aout
  73. SECTION .text
  74. %else
  75. SECTION .text align=%1
  76. %endif
  77. %endmacro
  78. %if WIN64
  79. %define PIC
  80. %elif ARCH_X86_64 == 0
  81. ; x86_32 doesn't require PIC.
  82. ; Some distros prefer shared objects to be PIC, but nothing breaks if
  83. ; the code contains a few textrels, so we'll skip that complexity.
  84. %undef PIC
  85. %endif
  86. %ifdef PIC
  87. default rel
  88. %endif
  89. ; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
  90. CPU amdnop
  91. ; Macros to eliminate most code duplication between x86_32 and x86_64:
  92. ; Currently this works only for leaf functions which load all their arguments
  93. ; into registers at the start, and make no other use of the stack. Luckily that
  94. ; covers most of x264's asm.
  95. ; PROLOGUE:
  96. ; %1 = number of arguments. loads them from stack if needed.
  97. ; %2 = number of registers used. pushes callee-saved regs if needed.
  98. ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
  99. ; %4 = list of names to define to registers
  100. ; PROLOGUE can also be invoked by adding the same options to cglobal
  101. ; e.g.
  102. ; cglobal foo, 2,3,0, dst, src, tmp
  103. ; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
  104. ; TODO Some functions can use some args directly from the stack. If they're the
  105. ; last args then you can just not declare them, but if they're in the middle
  106. ; we need more flexible macro.
  107. ; RET:
  108. ; Pops anything that was pushed by PROLOGUE, and returns.
  109. ; REP_RET:
  110. ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
  111. ; which are slow when a normal ret follows a branch.
  112. ; registers:
  113. ; rN and rNq are the native-size register holding function argument N
  114. ; rNd, rNw, rNb are dword, word, and byte size
  115. ; rNm is the original location of arg N (a register or on the stack), dword
  116. ; rNmp is native size
  117. %macro DECLARE_REG 5-6
  118. %define r%1q %2
  119. %define r%1d %3
  120. %define r%1w %4
  121. %define r%1b %5
  122. %if %0 == 5
  123. %define r%1m %3
  124. %define r%1mp %2
  125. %elif ARCH_X86_64 ; memory
  126. %define r%1m [rsp + stack_offset + %6]
  127. %define r%1mp qword r %+ %1m
  128. %else
  129. %define r%1m [esp + stack_offset + %6]
  130. %define r%1mp dword r %+ %1m
  131. %endif
  132. %define r%1 %2
  133. %endmacro
  134. %macro DECLARE_REG_SIZE 2
  135. %define r%1q r%1
  136. %define e%1q r%1
  137. %define r%1d e%1
  138. %define e%1d e%1
  139. %define r%1w %1
  140. %define e%1w %1
  141. %define r%1b %2
  142. %define e%1b %2
  143. %if ARCH_X86_64 == 0
  144. %define r%1 e%1
  145. %endif
  146. %endmacro
  147. DECLARE_REG_SIZE ax, al
  148. DECLARE_REG_SIZE bx, bl
  149. DECLARE_REG_SIZE cx, cl
  150. DECLARE_REG_SIZE dx, dl
  151. DECLARE_REG_SIZE si, sil
  152. DECLARE_REG_SIZE di, dil
  153. DECLARE_REG_SIZE bp, bpl
  154. ; t# defines for when per-arch register allocation is more complex than just function arguments
  155. %macro DECLARE_REG_TMP 1-*
  156. %assign %%i 0
  157. %rep %0
  158. CAT_XDEFINE t, %%i, r%1
  159. %assign %%i %%i+1
  160. %rotate 1
  161. %endrep
  162. %endmacro
  163. %macro DECLARE_REG_TMP_SIZE 0-*
  164. %rep %0
  165. %define t%1q t%1 %+ q
  166. %define t%1d t%1 %+ d
  167. %define t%1w t%1 %+ w
  168. %define t%1b t%1 %+ b
  169. %rotate 1
  170. %endrep
  171. %endmacro
  172. DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
  173. %if ARCH_X86_64
  174. %define gprsize 8
  175. %else
  176. %define gprsize 4
  177. %endif
  178. %macro PUSH 1
  179. push %1
  180. %assign stack_offset stack_offset+gprsize
  181. %endmacro
  182. %macro POP 1
  183. pop %1
  184. %assign stack_offset stack_offset-gprsize
  185. %endmacro
  186. %macro PUSH_IF_USED 1-*
  187. %rep %0
  188. %if %1 < regs_used
  189. PUSH r%1
  190. %endif
  191. %rotate 1
  192. %endrep
  193. %endmacro
  194. %macro POP_IF_USED 1-*
  195. %rep %0
  196. %if %1 < regs_used
  197. pop r%1
  198. %endif
  199. %rotate 1
  200. %endrep
  201. %endmacro
  202. %macro LOAD_IF_USED 1-*
  203. %rep %0
  204. %if %1 < num_args
  205. mov r%1, r %+ %1 %+ mp
  206. %endif
  207. %rotate 1
  208. %endrep
  209. %endmacro
  210. %macro SUB 2
  211. sub %1, %2
  212. %ifidn %1, rsp
  213. %assign stack_offset stack_offset+(%2)
  214. %endif
  215. %endmacro
  216. %macro ADD 2
  217. add %1, %2
  218. %ifidn %1, rsp
  219. %assign stack_offset stack_offset-(%2)
  220. %endif
  221. %endmacro
  222. %macro movifnidn 2
  223. %ifnidn %1, %2
  224. mov %1, %2
  225. %endif
  226. %endmacro
  227. %macro movsxdifnidn 2
  228. %ifnidn %1, %2
  229. movsxd %1, %2
  230. %endif
  231. %endmacro
  232. %macro ASSERT 1
  233. %if (%1) == 0
  234. %error assert failed
  235. %endif
  236. %endmacro
  237. %macro DEFINE_ARGS 0-*
  238. %ifdef n_arg_names
  239. %assign %%i 0
  240. %rep n_arg_names
  241. CAT_UNDEF arg_name %+ %%i, q
  242. CAT_UNDEF arg_name %+ %%i, d
  243. CAT_UNDEF arg_name %+ %%i, w
  244. CAT_UNDEF arg_name %+ %%i, b
  245. CAT_UNDEF arg_name %+ %%i, m
  246. CAT_UNDEF arg_name %+ %%i, mp
  247. CAT_UNDEF arg_name, %%i
  248. %assign %%i %%i+1
  249. %endrep
  250. %endif
  251. %xdefine %%stack_offset stack_offset
  252. %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
  253. %assign %%i 0
  254. %rep %0
  255. %xdefine %1q r %+ %%i %+ q
  256. %xdefine %1d r %+ %%i %+ d
  257. %xdefine %1w r %+ %%i %+ w
  258. %xdefine %1b r %+ %%i %+ b
  259. %xdefine %1m r %+ %%i %+ m
  260. %xdefine %1mp r %+ %%i %+ mp
  261. CAT_XDEFINE arg_name, %%i, %1
  262. %assign %%i %%i+1
  263. %rotate 1
  264. %endrep
  265. %xdefine stack_offset %%stack_offset
  266. %assign n_arg_names %0
  267. %endmacro
  268. %if WIN64 ; Windows x64 ;=================================================
  269. DECLARE_REG 0, rcx, ecx, cx, cl
  270. DECLARE_REG 1, rdx, edx, dx, dl
  271. DECLARE_REG 2, R8, R8D, R8W, R8B
  272. DECLARE_REG 3, R9, R9D, R9W, R9B
  273. DECLARE_REG 4, R10, R10D, R10W, R10B, 40
  274. DECLARE_REG 5, R11, R11D, R11W, R11B, 48
  275. DECLARE_REG 6, rax, eax, ax, al, 56
  276. DECLARE_REG 7, rdi, edi, di, dil, 64
  277. DECLARE_REG 8, rsi, esi, si, sil, 72
  278. DECLARE_REG 9, rbx, ebx, bx, bl, 80
  279. DECLARE_REG 10, rbp, ebp, bp, bpl, 88
  280. DECLARE_REG 11, R12, R12D, R12W, R12B, 96
  281. DECLARE_REG 12, R13, R13D, R13W, R13B, 104
  282. DECLARE_REG 13, R14, R14D, R14W, R14B, 112
  283. DECLARE_REG 14, R15, R15D, R15W, R15B, 120
  284. %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
  285. %assign num_args %1
  286. %assign regs_used %2
  287. ASSERT regs_used >= num_args
  288. ASSERT regs_used <= 15
  289. PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
  290. %if mmsize == 8
  291. %assign xmm_regs_used 0
  292. %else
  293. WIN64_SPILL_XMM %3
  294. %endif
  295. LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  296. DEFINE_ARGS %4
  297. %endmacro
  298. %macro WIN64_SPILL_XMM 1
  299. %assign xmm_regs_used %1
  300. ASSERT xmm_regs_used <= 16
  301. %if xmm_regs_used > 6
  302. SUB rsp, (xmm_regs_used-6)*16+16
  303. %assign %%i xmm_regs_used
  304. %rep (xmm_regs_used-6)
  305. %assign %%i %%i-1
  306. movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i
  307. %endrep
  308. %endif
  309. %endmacro
  310. %macro WIN64_RESTORE_XMM_INTERNAL 1
  311. %if xmm_regs_used > 6
  312. %assign %%i xmm_regs_used
  313. %rep (xmm_regs_used-6)
  314. %assign %%i %%i-1
  315. movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)]
  316. %endrep
  317. add %1, (xmm_regs_used-6)*16+16
  318. %endif
  319. %endmacro
  320. %macro WIN64_RESTORE_XMM 1
  321. WIN64_RESTORE_XMM_INTERNAL %1
  322. %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
  323. %assign xmm_regs_used 0
  324. %endmacro
  325. %macro RET 0
  326. WIN64_RESTORE_XMM_INTERNAL rsp
  327. POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
  328. ret
  329. %endmacro
  330. %macro REP_RET 0
  331. %if regs_used > 7 || xmm_regs_used > 6
  332. RET
  333. %else
  334. rep ret
  335. %endif
  336. %endmacro
  337. %elif ARCH_X86_64 ; *nix x64 ;=============================================
  338. DECLARE_REG 0, rdi, edi, di, dil
  339. DECLARE_REG 1, rsi, esi, si, sil
  340. DECLARE_REG 2, rdx, edx, dx, dl
  341. DECLARE_REG 3, rcx, ecx, cx, cl
  342. DECLARE_REG 4, R8, R8D, R8W, R8B
  343. DECLARE_REG 5, R9, R9D, R9W, R9B
  344. DECLARE_REG 6, rax, eax, ax, al, 8
  345. DECLARE_REG 7, R10, R10D, R10W, R10B, 16
  346. DECLARE_REG 8, R11, R11D, R11W, R11B, 24
  347. DECLARE_REG 9, rbx, ebx, bx, bl, 32
  348. DECLARE_REG 10, rbp, ebp, bp, bpl, 40
  349. DECLARE_REG 11, R12, R12D, R12W, R12B, 48
  350. DECLARE_REG 12, R13, R13D, R13W, R13B, 56
  351. DECLARE_REG 13, R14, R14D, R14W, R14B, 64
  352. DECLARE_REG 14, R15, R15D, R15W, R15B, 72
  353. %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
  354. %assign num_args %1
  355. %assign regs_used %2
  356. ASSERT regs_used >= num_args
  357. ASSERT regs_used <= 15
  358. PUSH_IF_USED 9, 10, 11, 12, 13, 14
  359. LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
  360. DEFINE_ARGS %4
  361. %endmacro
  362. %macro RET 0
  363. POP_IF_USED 14, 13, 12, 11, 10, 9
  364. ret
  365. %endmacro
  366. %macro REP_RET 0
  367. %if regs_used > 9
  368. RET
  369. %else
  370. rep ret
  371. %endif
  372. %endmacro
  373. %else ; X86_32 ;==============================================================
  374. DECLARE_REG 0, eax, eax, ax, al, 4
  375. DECLARE_REG 1, ecx, ecx, cx, cl, 8
  376. DECLARE_REG 2, edx, edx, dx, dl, 12
  377. DECLARE_REG 3, ebx, ebx, bx, bl, 16
  378. DECLARE_REG 4, esi, esi, si, null, 20
  379. DECLARE_REG 5, edi, edi, di, null, 24
  380. DECLARE_REG 6, ebp, ebp, bp, null, 28
  381. %define rsp esp
  382. %macro DECLARE_ARG 1-*
  383. %rep %0
  384. %define r%1m [esp + stack_offset + 4*%1 + 4]
  385. %define r%1mp dword r%1m
  386. %rotate 1
  387. %endrep
  388. %endmacro
  389. DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
  390. %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
  391. %assign num_args %1
  392. %assign regs_used %2
  393. %if regs_used > 7
  394. %assign regs_used 7
  395. %endif
  396. ASSERT regs_used >= num_args
  397. PUSH_IF_USED 3, 4, 5, 6
  398. LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
  399. DEFINE_ARGS %4
  400. %endmacro
  401. %macro RET 0
  402. POP_IF_USED 6, 5, 4, 3
  403. ret
  404. %endmacro
  405. %macro REP_RET 0
  406. %if regs_used > 3
  407. RET
  408. %else
  409. rep ret
  410. %endif
  411. %endmacro
  412. %endif ;======================================================================
  413. %if WIN64 == 0
  414. %macro WIN64_SPILL_XMM 1
  415. %endmacro
  416. %macro WIN64_RESTORE_XMM 1
  417. %endmacro
  418. %endif
  419. ;=============================================================================
  420. ; arch-independent part
  421. ;=============================================================================
  422. %assign function_align 16
  423. ; Begin a function.
  424. ; Applies any symbol mangling needed for C linkage, and sets up a define such that
  425. ; subsequent uses of the function name automatically refer to the mangled version.
  426. ; Appends cpuflags to the function name if cpuflags has been specified.
  427. %macro cglobal 1-2+ ; name, [PROLOGUE args]
  428. %if %0 == 1
  429. cglobal_internal %1 %+ SUFFIX
  430. %else
  431. cglobal_internal %1 %+ SUFFIX, %2
  432. %endif
  433. %endmacro
  434. %macro cglobal_internal 1-2+
  435. %ifndef cglobaled_%1
  436. %xdefine %1 mangle(program_name %+ _ %+ %1)
  437. %xdefine %1.skip_prologue %1 %+ .skip_prologue
  438. CAT_XDEFINE cglobaled_, %1, 1
  439. %endif
  440. %xdefine current_function %1
  441. %ifidn __OUTPUT_FORMAT__,elf
  442. global %1:function hidden
  443. %else
  444. global %1
  445. %endif
  446. align function_align
  447. %1:
  448. RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
  449. %assign stack_offset 0
  450. %if %0 > 1
  451. PROLOGUE %2
  452. %endif
  453. %endmacro
  454. %macro cextern 1
  455. %xdefine %1 mangle(program_name %+ _ %+ %1)
  456. CAT_XDEFINE cglobaled_, %1, 1
  457. extern %1
  458. %endmacro
  459. ; like cextern, but without the prefix
  460. %macro cextern_naked 1
  461. %xdefine %1 mangle(%1)
  462. CAT_XDEFINE cglobaled_, %1, 1
  463. extern %1
  464. %endmacro
  465. %macro const 2+
  466. %xdefine %1 mangle(program_name %+ _ %+ %1)
  467. global %1
  468. %1: %2
  469. %endmacro
  470. ; This is needed for ELF, otherwise the GNU linker assumes the stack is
  471. ; executable by default.
  472. %ifidn __OUTPUT_FORMAT__,elf
  473. SECTION .note.GNU-stack noalloc noexec nowrite progbits
  474. %endif
  475. ; cpuflags
  476. %assign cpuflags_mmx (1<<0)
  477. %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
  478. %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
  479. %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
  480. %assign cpuflags_sse (1<<4) | cpuflags_mmx2
  481. %assign cpuflags_sse2 (1<<5) | cpuflags_sse
  482. %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
  483. %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
  484. %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
  485. %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
  486. %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
  487. %assign cpuflags_avx (1<<11)| cpuflags_sse42
  488. %assign cpuflags_xop (1<<12)| cpuflags_avx
  489. %assign cpuflags_fma4 (1<<13)| cpuflags_avx
  490. %assign cpuflags_cache32 (1<<16)
  491. %assign cpuflags_cache64 (1<<17)
  492. %assign cpuflags_slowctz (1<<18)
  493. %assign cpuflags_lzcnt (1<<19)
  494. %assign cpuflags_misalign (1<<20)
  495. %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
  496. %assign cpuflags_atom (1<<22)
  497. %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
  498. %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
  499. ; Takes up to 2 cpuflags from the above list.
  500. ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
  501. ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
  502. %macro INIT_CPUFLAGS 0-2
  503. CPU amdnop
  504. %if %0 >= 1
  505. %xdefine cpuname %1
  506. %assign cpuflags cpuflags_%1
  507. %if %0 >= 2
  508. %xdefine cpuname %1_%2
  509. %assign cpuflags cpuflags | cpuflags_%2
  510. %endif
  511. %xdefine SUFFIX _ %+ cpuname
  512. %if cpuflag(avx)
  513. %assign avx_enabled 1
  514. %endif
  515. %if mmsize == 16 && notcpuflag(sse2)
  516. %define mova movaps
  517. %define movu movups
  518. %define movnta movntps
  519. %endif
  520. %if cpuflag(aligned)
  521. %define movu mova
  522. %elifidn %1, sse3
  523. %define movu lddqu
  524. %endif
  525. %if notcpuflag(mmx2)
  526. CPU basicnop
  527. %endif
  528. %else
  529. %xdefine SUFFIX
  530. %undef cpuname
  531. %undef cpuflags
  532. %endif
  533. %endmacro
  534. ; merge mmx and sse*
  535. %macro CAT_XDEFINE 3
  536. %xdefine %1%2 %3
  537. %endmacro
  538. %macro CAT_UNDEF 2
  539. %undef %1%2
  540. %endmacro
  541. %macro INIT_MMX 0-1+
  542. %assign avx_enabled 0
  543. %define RESET_MM_PERMUTATION INIT_MMX %1
  544. %define mmsize 8
  545. %define num_mmregs 8
  546. %define mova movq
  547. %define movu movq
  548. %define movh movd
  549. %define movnta movntq
  550. %assign %%i 0
  551. %rep 8
  552. CAT_XDEFINE m, %%i, mm %+ %%i
  553. CAT_XDEFINE nmm, %%i, %%i
  554. %assign %%i %%i+1
  555. %endrep
  556. %rep 8
  557. CAT_UNDEF m, %%i
  558. CAT_UNDEF nmm, %%i
  559. %assign %%i %%i+1
  560. %endrep
  561. INIT_CPUFLAGS %1
  562. %endmacro
  563. %macro INIT_XMM 0-1+
  564. %assign avx_enabled 0
  565. %define RESET_MM_PERMUTATION INIT_XMM %1
  566. %define mmsize 16
  567. %define num_mmregs 8
  568. %if ARCH_X86_64
  569. %define num_mmregs 16
  570. %endif
  571. %define mova movdqa
  572. %define movu movdqu
  573. %define movh movq
  574. %define movnta movntdq
  575. %assign %%i 0
  576. %rep num_mmregs
  577. CAT_XDEFINE m, %%i, xmm %+ %%i
  578. CAT_XDEFINE nxmm, %%i, %%i
  579. %assign %%i %%i+1
  580. %endrep
  581. INIT_CPUFLAGS %1
  582. %endmacro
  583. ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
  584. %macro INIT_AVX 0
  585. INIT_XMM
  586. %assign avx_enabled 1
  587. %define PALIGNR PALIGNR_SSSE3
  588. %define RESET_MM_PERMUTATION INIT_AVX
  589. %endmacro
  590. %macro INIT_YMM 0-1+
  591. %assign avx_enabled 1
  592. %define RESET_MM_PERMUTATION INIT_YMM %1
  593. %define mmsize 32
  594. %define num_mmregs 8
  595. %if ARCH_X86_64
  596. %define num_mmregs 16
  597. %endif
  598. %define mova vmovaps
  599. %define movu vmovups
  600. %undef movh
  601. %define movnta vmovntps
  602. %assign %%i 0
  603. %rep num_mmregs
  604. CAT_XDEFINE m, %%i, ymm %+ %%i
  605. CAT_XDEFINE nymm, %%i, %%i
  606. %assign %%i %%i+1
  607. %endrep
  608. INIT_CPUFLAGS %1
  609. %endmacro
  610. INIT_XMM
  611. ; I often want to use macros that permute their arguments. e.g. there's no
  612. ; efficient way to implement butterfly or transpose or dct without swapping some
  613. ; arguments.
  614. ;
  615. ; I would like to not have to manually keep track of the permutations:
  616. ; If I insert a permutation in the middle of a function, it should automatically
  617. ; change everything that follows. For more complex macros I may also have multiple
  618. ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
  619. ;
  620. ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
  621. ; permutes its arguments. It's equivalent to exchanging the contents of the
  622. ; registers, except that this way you exchange the register names instead, so it
  623. ; doesn't cost any cycles.
  624. %macro PERMUTE 2-* ; takes a list of pairs to swap
  625. %rep %0/2
  626. %xdefine tmp%2 m%2
  627. %xdefine ntmp%2 nm%2
  628. %rotate 2
  629. %endrep
  630. %rep %0/2
  631. %xdefine m%1 tmp%2
  632. %xdefine nm%1 ntmp%2
  633. %undef tmp%2
  634. %undef ntmp%2
  635. %rotate 2
  636. %endrep
  637. %endmacro
  638. %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
  639. %rep %0-1
  640. %ifdef m%1
  641. %xdefine tmp m%1
  642. %xdefine m%1 m%2
  643. %xdefine m%2 tmp
  644. CAT_XDEFINE n, m%1, %1
  645. CAT_XDEFINE n, m%2, %2
  646. %else
  647. ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
  648. ; Be careful using this mode in nested macros though, as in some cases there may be
  649. ; other copies of m# that have already been dereferenced and don't get updated correctly.
  650. %xdefine %%n1 n %+ %1
  651. %xdefine %%n2 n %+ %2
  652. %xdefine tmp m %+ %%n1
  653. CAT_XDEFINE m, %%n1, m %+ %%n2
  654. CAT_XDEFINE m, %%n2, tmp
  655. CAT_XDEFINE n, m %+ %%n1, %%n1
  656. CAT_XDEFINE n, m %+ %%n2, %%n2
  657. %endif
  658. %undef tmp
  659. %rotate 1
  660. %endrep
  661. %endmacro
  662. ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
  663. ; calls to that function will automatically load the permutation, so values can
  664. ; be returned in mmregs.
  665. %macro SAVE_MM_PERMUTATION 0-1
  666. %if %0
  667. %xdefine %%f %1_m
  668. %else
  669. %xdefine %%f current_function %+ _m
  670. %endif
  671. %assign %%i 0
  672. %rep num_mmregs
  673. CAT_XDEFINE %%f, %%i, m %+ %%i
  674. %assign %%i %%i+1
  675. %endrep
  676. %endmacro
  677. %macro LOAD_MM_PERMUTATION 1 ; name to load from
  678. %ifdef %1_m0
  679. %assign %%i 0
  680. %rep num_mmregs
  681. CAT_XDEFINE m, %%i, %1_m %+ %%i
  682. CAT_XDEFINE n, m %+ %%i, %%i
  683. %assign %%i %%i+1
  684. %endrep
  685. %endif
  686. %endmacro
  687. ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
  688. %macro call 1
  689. call_internal %1, %1 %+ SUFFIX
  690. %endmacro
  691. %macro call_internal 2
  692. %xdefine %%i %1
  693. %ifndef cglobaled_%1
  694. %ifdef cglobaled_%2
  695. %xdefine %%i %2
  696. %endif
  697. %endif
  698. call %%i
  699. LOAD_MM_PERMUTATION %%i
  700. %endmacro
  701. ; Substitutions that reduce instruction size but are functionally equivalent
  702. %macro add 2
  703. %ifnum %2
  704. %if %2==128
  705. sub %1, -128
  706. %else
  707. add %1, %2
  708. %endif
  709. %else
  710. add %1, %2
  711. %endif
  712. %endmacro
  713. %macro sub 2
  714. %ifnum %2
  715. %if %2==128
  716. add %1, -128
  717. %else
  718. sub %1, %2
  719. %endif
  720. %else
  721. sub %1, %2
  722. %endif
  723. %endmacro
  724. ;=============================================================================
  725. ; AVX abstraction layer
  726. ;=============================================================================
  727. %assign i 0
  728. %rep 16
  729. %if i < 8
  730. CAT_XDEFINE sizeofmm, i, 8
  731. %endif
  732. CAT_XDEFINE sizeofxmm, i, 16
  733. CAT_XDEFINE sizeofymm, i, 32
  734. %assign i i+1
  735. %endrep
  736. %undef i
  737. ;%1 == instruction
  738. ;%2 == 1 if float, 0 if int
  739. ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
  740. ;%4 == number of operands given
  741. ;%5+: operands
  742. %macro RUN_AVX_INSTR 6-7+
  743. %ifid %5
  744. %define %%size sizeof%5
  745. %else
  746. %define %%size mmsize
  747. %endif
  748. %if %%size==32
  749. %if %0 >= 7
  750. v%1 %5, %6, %7
  751. %else
  752. v%1 %5, %6
  753. %endif
  754. %else
  755. %if %%size==8
  756. %define %%regmov movq
  757. %elif %2
  758. %define %%regmov movaps
  759. %else
  760. %define %%regmov movdqa
  761. %endif
  762. %if %4>=3+%3
  763. %ifnidn %5, %6
  764. %if avx_enabled && sizeof%5==16
  765. v%1 %5, %6, %7
  766. %else
  767. %%regmov %5, %6
  768. %1 %5, %7
  769. %endif
  770. %else
  771. %1 %5, %7
  772. %endif
  773. %elif %3
  774. %1 %5, %6, %7
  775. %else
  776. %1 %5, %6
  777. %endif
  778. %endif
  779. %endmacro
  780. ; 3arg AVX ops with a memory arg can only have it in src2,
  781. ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
  782. ; So, if the op is symmetric and the wrong one is memory, swap them.
  783. %macro RUN_AVX_INSTR1 8
  784. %assign %%swap 0
  785. %if avx_enabled
  786. %ifnid %6
  787. %assign %%swap 1
  788. %endif
  789. %elifnidn %5, %6
  790. %ifnid %7
  791. %assign %%swap 1
  792. %endif
  793. %endif
  794. %if %%swap && %3 == 0 && %8 == 1
  795. RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
  796. %else
  797. RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
  798. %endif
  799. %endmacro
  800. ;%1 == instruction
  801. ;%2 == 1 if float, 0 if int
  802. ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
  803. ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
  804. %macro AVX_INSTR 4
  805. %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
  806. %ifidn %3, fnord
  807. RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
  808. %elifidn %4, fnord
  809. RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
  810. %elifidn %5, fnord
  811. RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
  812. %else
  813. RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
  814. %endif
  815. %endmacro
  816. %endmacro
  817. AVX_INSTR addpd, 1, 0, 1
  818. AVX_INSTR addps, 1, 0, 1
  819. AVX_INSTR addsd, 1, 0, 1
  820. AVX_INSTR addss, 1, 0, 1
  821. AVX_INSTR addsubpd, 1, 0, 0
  822. AVX_INSTR addsubps, 1, 0, 0
  823. AVX_INSTR andpd, 1, 0, 1
  824. AVX_INSTR andps, 1, 0, 1
  825. AVX_INSTR andnpd, 1, 0, 0
  826. AVX_INSTR andnps, 1, 0, 0
  827. AVX_INSTR blendpd, 1, 0, 0
  828. AVX_INSTR blendps, 1, 0, 0
  829. AVX_INSTR blendvpd, 1, 0, 0
  830. AVX_INSTR blendvps, 1, 0, 0
  831. AVX_INSTR cmppd, 1, 0, 0
  832. AVX_INSTR cmpps, 1, 0, 0
  833. AVX_INSTR cmpsd, 1, 0, 0
  834. AVX_INSTR cmpss, 1, 0, 0
  835. AVX_INSTR cvtdq2ps, 1, 0, 0
  836. AVX_INSTR cvtps2dq, 1, 0, 0
  837. AVX_INSTR divpd, 1, 0, 0
  838. AVX_INSTR divps, 1, 0, 0
  839. AVX_INSTR divsd, 1, 0, 0
  840. AVX_INSTR divss, 1, 0, 0
  841. AVX_INSTR dppd, 1, 1, 0
  842. AVX_INSTR dpps, 1, 1, 0
  843. AVX_INSTR haddpd, 1, 0, 0
  844. AVX_INSTR haddps, 1, 0, 0
  845. AVX_INSTR hsubpd, 1, 0, 0
  846. AVX_INSTR hsubps, 1, 0, 0
  847. AVX_INSTR maxpd, 1, 0, 1
  848. AVX_INSTR maxps, 1, 0, 1
  849. AVX_INSTR maxsd, 1, 0, 1
  850. AVX_INSTR maxss, 1, 0, 1
  851. AVX_INSTR minpd, 1, 0, 1
  852. AVX_INSTR minps, 1, 0, 1
  853. AVX_INSTR minsd, 1, 0, 1
  854. AVX_INSTR minss, 1, 0, 1
  855. AVX_INSTR movhlps, 1, 0, 0
  856. AVX_INSTR movlhps, 1, 0, 0
  857. AVX_INSTR movsd, 1, 0, 0
  858. AVX_INSTR movss, 1, 0, 0
  859. AVX_INSTR mpsadbw, 0, 1, 0
  860. AVX_INSTR mulpd, 1, 0, 1
  861. AVX_INSTR mulps, 1, 0, 1
  862. AVX_INSTR mulsd, 1, 0, 1
  863. AVX_INSTR mulss, 1, 0, 1
  864. AVX_INSTR orpd, 1, 0, 1
  865. AVX_INSTR orps, 1, 0, 1
  866. AVX_INSTR packsswb, 0, 0, 0
  867. AVX_INSTR packssdw, 0, 0, 0
  868. AVX_INSTR packuswb, 0, 0, 0
  869. AVX_INSTR packusdw, 0, 0, 0
  870. AVX_INSTR paddb, 0, 0, 1
  871. AVX_INSTR paddw, 0, 0, 1
  872. AVX_INSTR paddd, 0, 0, 1
  873. AVX_INSTR paddq, 0, 0, 1
  874. AVX_INSTR paddsb, 0, 0, 1
  875. AVX_INSTR paddsw, 0, 0, 1
  876. AVX_INSTR paddusb, 0, 0, 1
  877. AVX_INSTR paddusw, 0, 0, 1
  878. AVX_INSTR palignr, 0, 1, 0
  879. AVX_INSTR pand, 0, 0, 1
  880. AVX_INSTR pandn, 0, 0, 0
  881. AVX_INSTR pavgb, 0, 0, 1
  882. AVX_INSTR pavgw, 0, 0, 1
  883. AVX_INSTR pblendvb, 0, 0, 0
  884. AVX_INSTR pblendw, 0, 1, 0
  885. AVX_INSTR pcmpestri, 0, 0, 0
  886. AVX_INSTR pcmpestrm, 0, 0, 0
  887. AVX_INSTR pcmpistri, 0, 0, 0
  888. AVX_INSTR pcmpistrm, 0, 0, 0
  889. AVX_INSTR pcmpeqb, 0, 0, 1
  890. AVX_INSTR pcmpeqw, 0, 0, 1
  891. AVX_INSTR pcmpeqd, 0, 0, 1
  892. AVX_INSTR pcmpeqq, 0, 0, 1
  893. AVX_INSTR pcmpgtb, 0, 0, 0
  894. AVX_INSTR pcmpgtw, 0, 0, 0
  895. AVX_INSTR pcmpgtd, 0, 0, 0
  896. AVX_INSTR pcmpgtq, 0, 0, 0
  897. AVX_INSTR phaddw, 0, 0, 0
  898. AVX_INSTR phaddd, 0, 0, 0
  899. AVX_INSTR phaddsw, 0, 0, 0
  900. AVX_INSTR phsubw, 0, 0, 0
  901. AVX_INSTR phsubd, 0, 0, 0
  902. AVX_INSTR phsubsw, 0, 0, 0
  903. AVX_INSTR pmaddwd, 0, 0, 1
  904. AVX_INSTR pmaddubsw, 0, 0, 0
  905. AVX_INSTR pmaxsb, 0, 0, 1
  906. AVX_INSTR pmaxsw, 0, 0, 1
  907. AVX_INSTR pmaxsd, 0, 0, 1
  908. AVX_INSTR pmaxub, 0, 0, 1
  909. AVX_INSTR pmaxuw, 0, 0, 1
  910. AVX_INSTR pmaxud, 0, 0, 1
  911. AVX_INSTR pminsb, 0, 0, 1
  912. AVX_INSTR pminsw, 0, 0, 1
  913. AVX_INSTR pminsd, 0, 0, 1
  914. AVX_INSTR pminub, 0, 0, 1
  915. AVX_INSTR pminuw, 0, 0, 1
  916. AVX_INSTR pminud, 0, 0, 1
  917. AVX_INSTR pmulhuw, 0, 0, 1
  918. AVX_INSTR pmulhrsw, 0, 0, 1
  919. AVX_INSTR pmulhw, 0, 0, 1
  920. AVX_INSTR pmullw, 0, 0, 1
  921. AVX_INSTR pmulld, 0, 0, 1
  922. AVX_INSTR pmuludq, 0, 0, 1
  923. AVX_INSTR pmuldq, 0, 0, 1
  924. AVX_INSTR por, 0, 0, 1
  925. AVX_INSTR psadbw, 0, 0, 1
  926. AVX_INSTR pshufb, 0, 0, 0
  927. AVX_INSTR psignb, 0, 0, 0
  928. AVX_INSTR psignw, 0, 0, 0
  929. AVX_INSTR psignd, 0, 0, 0
  930. AVX_INSTR psllw, 0, 0, 0
  931. AVX_INSTR pslld, 0, 0, 0
  932. AVX_INSTR psllq, 0, 0, 0
  933. AVX_INSTR pslldq, 0, 0, 0
  934. AVX_INSTR psraw, 0, 0, 0
  935. AVX_INSTR psrad, 0, 0, 0
  936. AVX_INSTR psrlw, 0, 0, 0
  937. AVX_INSTR psrld, 0, 0, 0
  938. AVX_INSTR psrlq, 0, 0, 0
  939. AVX_INSTR psrldq, 0, 0, 0
  940. AVX_INSTR psubb, 0, 0, 0
  941. AVX_INSTR psubw, 0, 0, 0
  942. AVX_INSTR psubd, 0, 0, 0
  943. AVX_INSTR psubq, 0, 0, 0
  944. AVX_INSTR psubsb, 0, 0, 0
  945. AVX_INSTR psubsw, 0, 0, 0
  946. AVX_INSTR psubusb, 0, 0, 0
  947. AVX_INSTR psubusw, 0, 0, 0
  948. AVX_INSTR punpckhbw, 0, 0, 0
  949. AVX_INSTR punpckhwd, 0, 0, 0
  950. AVX_INSTR punpckhdq, 0, 0, 0
  951. AVX_INSTR punpckhqdq, 0, 0, 0
  952. AVX_INSTR punpcklbw, 0, 0, 0
  953. AVX_INSTR punpcklwd, 0, 0, 0
  954. AVX_INSTR punpckldq, 0, 0, 0
  955. AVX_INSTR punpcklqdq, 0, 0, 0
  956. AVX_INSTR pxor, 0, 0, 1
  957. AVX_INSTR shufps, 1, 1, 0
  958. AVX_INSTR subpd, 1, 0, 0
  959. AVX_INSTR subps, 1, 0, 0
  960. AVX_INSTR subsd, 1, 0, 0
  961. AVX_INSTR subss, 1, 0, 0
  962. AVX_INSTR unpckhpd, 1, 0, 0
  963. AVX_INSTR unpckhps, 1, 0, 0
  964. AVX_INSTR unpcklpd, 1, 0, 0
  965. AVX_INSTR unpcklps, 1, 0, 0
  966. AVX_INSTR xorpd, 1, 0, 1
  967. AVX_INSTR xorps, 1, 0, 1
  968. ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
  969. AVX_INSTR pfadd, 1, 0, 1
  970. AVX_INSTR pfsub, 1, 0, 0
  971. AVX_INSTR pfmul, 1, 0, 1
  972. ; base-4 constants for shuffles
  973. %assign i 0
  974. %rep 256
  975. %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
  976. %if j < 10
  977. CAT_XDEFINE q000, j, i
  978. %elif j < 100
  979. CAT_XDEFINE q00, j, i
  980. %elif j < 1000
  981. CAT_XDEFINE q0, j, i
  982. %else
  983. CAT_XDEFINE q, j, i
  984. %endif
  985. %assign i i+1
  986. %endrep
  987. %undef i
  988. %undef j
  989. %macro FMA_INSTR 3
  990. %macro %1 4-7 %1, %2, %3
  991. %if cpuflag(xop)
  992. v%5 %1, %2, %3, %4
  993. %else
  994. %6 %1, %2, %3
  995. %7 %1, %4
  996. %endif
  997. %endmacro
  998. %endmacro
  999. FMA_INSTR pmacsdd, pmulld, paddd
  1000. FMA_INSTR pmacsww, pmullw, paddw
  1001. FMA_INSTR pmadcswd, pmaddwd, paddd