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  1. /*
  2. * Copyright (c) 2001 Michel Lespinasse
  3. *
  4. * This file is part of FFmpeg.
  5. *
  6. * FFmpeg is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2.1 of the License, or (at your option) any later version.
  10. *
  11. * FFmpeg is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with FFmpeg; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  19. *
  20. */
  21. /*
  22. * NOTE: This code is based on GPL code from the libmpeg2 project. The
  23. * author, Michel Lespinasses, has given explicit permission to release
  24. * under LGPL as part of ffmpeg.
  25. *
  26. */
  27. /*
  28. * FFMpeg integration by Dieter Shirley
  29. *
  30. * This file is a direct copy of the altivec idct module from the libmpeg2
  31. * project. I've deleted all of the libmpeg2 specific code, renamed the functions and
  32. * re-ordered the function parameters. The only change to the IDCT function
  33. * itself was to factor out the partial transposition, and to perform a full
  34. * transpose at the end of the function.
  35. */
  36. #include <stdlib.h> /* malloc(), free() */
  37. #include <string.h>
  38. #include "../dsputil.h"
  39. #include "gcc_fixes.h"
  40. #include "dsputil_altivec.h"
  41. #define vector_s16_t vector signed short
  42. #define const_vector_s16_t const_vector signed short
  43. #define vector_u16_t vector unsigned short
  44. #define vector_s8_t vector signed char
  45. #define vector_u8_t vector unsigned char
  46. #define vector_s32_t vector signed int
  47. #define vector_u32_t vector unsigned int
  48. #define IDCT_HALF \
  49. /* 1st stage */ \
  50. t1 = vec_mradds (a1, vx7, vx1 ); \
  51. t8 = vec_mradds (a1, vx1, vec_subs (zero, vx7)); \
  52. t7 = vec_mradds (a2, vx5, vx3); \
  53. t3 = vec_mradds (ma2, vx3, vx5); \
  54. \
  55. /* 2nd stage */ \
  56. t5 = vec_adds (vx0, vx4); \
  57. t0 = vec_subs (vx0, vx4); \
  58. t2 = vec_mradds (a0, vx6, vx2); \
  59. t4 = vec_mradds (a0, vx2, vec_subs (zero, vx6)); \
  60. t6 = vec_adds (t8, t3); \
  61. t3 = vec_subs (t8, t3); \
  62. t8 = vec_subs (t1, t7); \
  63. t1 = vec_adds (t1, t7); \
  64. \
  65. /* 3rd stage */ \
  66. t7 = vec_adds (t5, t2); \
  67. t2 = vec_subs (t5, t2); \
  68. t5 = vec_adds (t0, t4); \
  69. t0 = vec_subs (t0, t4); \
  70. t4 = vec_subs (t8, t3); \
  71. t3 = vec_adds (t8, t3); \
  72. \
  73. /* 4th stage */ \
  74. vy0 = vec_adds (t7, t1); \
  75. vy7 = vec_subs (t7, t1); \
  76. vy1 = vec_mradds (c4, t3, t5); \
  77. vy6 = vec_mradds (mc4, t3, t5); \
  78. vy2 = vec_mradds (c4, t4, t0); \
  79. vy5 = vec_mradds (mc4, t4, t0); \
  80. vy3 = vec_adds (t2, t6); \
  81. vy4 = vec_subs (t2, t6);
  82. #define IDCT \
  83. vector_s16_t vx0, vx1, vx2, vx3, vx4, vx5, vx6, vx7; \
  84. vector_s16_t vy0, vy1, vy2, vy3, vy4, vy5, vy6, vy7; \
  85. vector_s16_t a0, a1, a2, ma2, c4, mc4, zero, bias; \
  86. vector_s16_t t0, t1, t2, t3, t4, t5, t6, t7, t8; \
  87. vector_u16_t shift; \
  88. \
  89. c4 = vec_splat (constants[0], 0); \
  90. a0 = vec_splat (constants[0], 1); \
  91. a1 = vec_splat (constants[0], 2); \
  92. a2 = vec_splat (constants[0], 3); \
  93. mc4 = vec_splat (constants[0], 4); \
  94. ma2 = vec_splat (constants[0], 5); \
  95. bias = (vector_s16_t)vec_splat ((vector_s32_t)constants[0], 3); \
  96. \
  97. zero = vec_splat_s16 (0); \
  98. shift = vec_splat_u16 (4); \
  99. \
  100. vx0 = vec_mradds (vec_sl (block[0], shift), constants[1], zero); \
  101. vx1 = vec_mradds (vec_sl (block[1], shift), constants[2], zero); \
  102. vx2 = vec_mradds (vec_sl (block[2], shift), constants[3], zero); \
  103. vx3 = vec_mradds (vec_sl (block[3], shift), constants[4], zero); \
  104. vx4 = vec_mradds (vec_sl (block[4], shift), constants[1], zero); \
  105. vx5 = vec_mradds (vec_sl (block[5], shift), constants[4], zero); \
  106. vx6 = vec_mradds (vec_sl (block[6], shift), constants[3], zero); \
  107. vx7 = vec_mradds (vec_sl (block[7], shift), constants[2], zero); \
  108. \
  109. IDCT_HALF \
  110. \
  111. vx0 = vec_mergeh (vy0, vy4); \
  112. vx1 = vec_mergel (vy0, vy4); \
  113. vx2 = vec_mergeh (vy1, vy5); \
  114. vx3 = vec_mergel (vy1, vy5); \
  115. vx4 = vec_mergeh (vy2, vy6); \
  116. vx5 = vec_mergel (vy2, vy6); \
  117. vx6 = vec_mergeh (vy3, vy7); \
  118. vx7 = vec_mergel (vy3, vy7); \
  119. \
  120. vy0 = vec_mergeh (vx0, vx4); \
  121. vy1 = vec_mergel (vx0, vx4); \
  122. vy2 = vec_mergeh (vx1, vx5); \
  123. vy3 = vec_mergel (vx1, vx5); \
  124. vy4 = vec_mergeh (vx2, vx6); \
  125. vy5 = vec_mergel (vx2, vx6); \
  126. vy6 = vec_mergeh (vx3, vx7); \
  127. vy7 = vec_mergel (vx3, vx7); \
  128. \
  129. vx0 = vec_adds (vec_mergeh (vy0, vy4), bias); \
  130. vx1 = vec_mergel (vy0, vy4); \
  131. vx2 = vec_mergeh (vy1, vy5); \
  132. vx3 = vec_mergel (vy1, vy5); \
  133. vx4 = vec_mergeh (vy2, vy6); \
  134. vx5 = vec_mergel (vy2, vy6); \
  135. vx6 = vec_mergeh (vy3, vy7); \
  136. vx7 = vec_mergel (vy3, vy7); \
  137. \
  138. IDCT_HALF \
  139. \
  140. shift = vec_splat_u16 (6); \
  141. vx0 = vec_sra (vy0, shift); \
  142. vx1 = vec_sra (vy1, shift); \
  143. vx2 = vec_sra (vy2, shift); \
  144. vx3 = vec_sra (vy3, shift); \
  145. vx4 = vec_sra (vy4, shift); \
  146. vx5 = vec_sra (vy5, shift); \
  147. vx6 = vec_sra (vy6, shift); \
  148. vx7 = vec_sra (vy7, shift);
  149. static const_vector_s16_t constants[5] = {
  150. (vector_s16_t) AVV(23170, 13573, 6518, 21895, -23170, -21895, 32, 31),
  151. (vector_s16_t) AVV(16384, 22725, 21407, 19266, 16384, 19266, 21407, 22725),
  152. (vector_s16_t) AVV(22725, 31521, 29692, 26722, 22725, 26722, 29692, 31521),
  153. (vector_s16_t) AVV(21407, 29692, 27969, 25172, 21407, 25172, 27969, 29692),
  154. (vector_s16_t) AVV(19266, 26722, 25172, 22654, 19266, 22654, 25172, 26722)
  155. };
  156. void idct_put_altivec(uint8_t* dest, int stride, vector_s16_t* block)
  157. {
  158. POWERPC_PERF_DECLARE(altivec_idct_put_num, 1);
  159. vector_u8_t tmp;
  160. #ifdef CONFIG_POWERPC_PERF
  161. POWERPC_PERF_START_COUNT(altivec_idct_put_num, 1);
  162. #endif
  163. IDCT
  164. #define COPY(dest,src) \
  165. tmp = vec_packsu (src, src); \
  166. vec_ste ((vector_u32_t)tmp, 0, (unsigned int *)dest); \
  167. vec_ste ((vector_u32_t)tmp, 4, (unsigned int *)dest);
  168. COPY (dest, vx0) dest += stride;
  169. COPY (dest, vx1) dest += stride;
  170. COPY (dest, vx2) dest += stride;
  171. COPY (dest, vx3) dest += stride;
  172. COPY (dest, vx4) dest += stride;
  173. COPY (dest, vx5) dest += stride;
  174. COPY (dest, vx6) dest += stride;
  175. COPY (dest, vx7)
  176. POWERPC_PERF_STOP_COUNT(altivec_idct_put_num, 1);
  177. }
  178. void idct_add_altivec(uint8_t* dest, int stride, vector_s16_t* block)
  179. {
  180. POWERPC_PERF_DECLARE(altivec_idct_add_num, 1);
  181. vector_u8_t tmp;
  182. vector_s16_t tmp2, tmp3;
  183. vector_u8_t perm0;
  184. vector_u8_t perm1;
  185. vector_u8_t p0, p1, p;
  186. #ifdef CONFIG_POWERPC_PERF
  187. POWERPC_PERF_START_COUNT(altivec_idct_add_num, 1);
  188. #endif
  189. IDCT
  190. p0 = vec_lvsl (0, dest);
  191. p1 = vec_lvsl (stride, dest);
  192. p = vec_splat_u8 (-1);
  193. perm0 = vec_mergeh (p, p0);
  194. perm1 = vec_mergeh (p, p1);
  195. #define ADD(dest,src,perm) \
  196. /* *(uint64_t *)&tmp = *(uint64_t *)dest; */ \
  197. tmp = vec_ld (0, dest); \
  198. tmp2 = (vector_s16_t)vec_perm (tmp, (vector_u8_t)zero, perm); \
  199. tmp3 = vec_adds (tmp2, src); \
  200. tmp = vec_packsu (tmp3, tmp3); \
  201. vec_ste ((vector_u32_t)tmp, 0, (unsigned int *)dest); \
  202. vec_ste ((vector_u32_t)tmp, 4, (unsigned int *)dest);
  203. ADD (dest, vx0, perm0) dest += stride;
  204. ADD (dest, vx1, perm1) dest += stride;
  205. ADD (dest, vx2, perm0) dest += stride;
  206. ADD (dest, vx3, perm1) dest += stride;
  207. ADD (dest, vx4, perm0) dest += stride;
  208. ADD (dest, vx5, perm1) dest += stride;
  209. ADD (dest, vx6, perm0) dest += stride;
  210. ADD (dest, vx7, perm1)
  211. POWERPC_PERF_STOP_COUNT(altivec_idct_add_num, 1);
  212. }