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  1. ;*****************************************************************************
  2. ;* MMX/SSE2/AVX-optimized 10-bit H.264 iDCT code
  3. ;*****************************************************************************
  4. ;* Copyright (C) 2005-2011 x264 project
  5. ;*
  6. ;* Authors: Daniel Kang <daniel.d.kang@gmail.com>
  7. ;*
  8. ;* This file is part of Libav.
  9. ;*
  10. ;* Libav is free software; you can redistribute it and/or
  11. ;* modify it under the terms of the GNU Lesser General Public
  12. ;* License as published by the Free Software Foundation; either
  13. ;* version 2.1 of the License, or (at your option) any later version.
  14. ;*
  15. ;* Libav is distributed in the hope that it will be useful,
  16. ;* but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. ;* Lesser General Public License for more details.
  19. ;*
  20. ;* You should have received a copy of the GNU Lesser General Public
  21. ;* License along with Libav; if not, write to the Free Software
  22. ;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  23. ;******************************************************************************
  24. %include "libavutil/x86/x86util.asm"
  25. SECTION_RODATA
  26. pw_pixel_max: times 8 dw ((1 << 10)-1)
  27. pd_32: times 4 dd 32
  28. SECTION .text
  29. ;-----------------------------------------------------------------------------
  30. ; void h264_idct_add(pixel *dst, dctcoef *block, int stride)
  31. ;-----------------------------------------------------------------------------
  32. %macro STORE_DIFFx2 6
  33. psrad %1, 6
  34. psrad %2, 6
  35. packssdw %1, %2
  36. movq %3, [%5]
  37. movhps %3, [%5+%6]
  38. paddsw %1, %3
  39. CLIPW %1, %4, [pw_pixel_max]
  40. movq [%5], %1
  41. movhps [%5+%6], %1
  42. %endmacro
  43. %macro STORE_DIFF16 5
  44. psrad %1, 6
  45. psrad %2, 6
  46. packssdw %1, %2
  47. paddsw %1, [%5]
  48. CLIPW %1, %3, %4
  49. mova [%5], %1
  50. %endmacro
  51. ;dst, in, stride
  52. %macro IDCT4_ADD_10 3
  53. mova m0, [%2+ 0]
  54. mova m1, [%2+16]
  55. mova m2, [%2+32]
  56. mova m3, [%2+48]
  57. IDCT4_1D d,0,1,2,3,4,5
  58. TRANSPOSE4x4D 0,1,2,3,4
  59. paddd m0, [pd_32]
  60. IDCT4_1D d,0,1,2,3,4,5
  61. pxor m5, m5
  62. STORE_DIFFx2 m0, m1, m4, m5, %1, %3
  63. lea %1, [%1+%3*2]
  64. STORE_DIFFx2 m2, m3, m4, m5, %1, %3
  65. %endmacro
  66. %macro IDCT_ADD_10 0
  67. cglobal h264_idct_add_10, 3,3
  68. IDCT4_ADD_10 r0, r1, r2
  69. RET
  70. %endmacro
  71. INIT_XMM sse2
  72. IDCT_ADD_10
  73. %if HAVE_AVX_EXTERNAL
  74. INIT_XMM avx
  75. IDCT_ADD_10
  76. %endif
  77. ;-----------------------------------------------------------------------------
  78. ; h264_idct_add16(pixel *dst, const int *block_offset, dctcoef *block, int stride, const uint8_t nnzc[6*8])
  79. ;-----------------------------------------------------------------------------
  80. ;;;;;;; NO FATE SAMPLES TRIGGER THIS
  81. %macro ADD4x4IDCT 0
  82. add4x4_idct %+ SUFFIX:
  83. add r5, r0
  84. mova m0, [r2+ 0]
  85. mova m1, [r2+16]
  86. mova m2, [r2+32]
  87. mova m3, [r2+48]
  88. IDCT4_1D d,0,1,2,3,4,5
  89. TRANSPOSE4x4D 0,1,2,3,4
  90. paddd m0, [pd_32]
  91. IDCT4_1D d,0,1,2,3,4,5
  92. pxor m5, m5
  93. STORE_DIFFx2 m0, m1, m4, m5, r5, r3
  94. lea r5, [r5+r3*2]
  95. STORE_DIFFx2 m2, m3, m4, m5, r5, r3
  96. ret
  97. %endmacro
  98. INIT_XMM sse2
  99. ALIGN 16
  100. ADD4x4IDCT
  101. %if HAVE_AVX_EXTERNAL
  102. INIT_XMM avx
  103. ALIGN 16
  104. ADD4x4IDCT
  105. %endif
  106. %macro ADD16_OP 2
  107. cmp byte [r4+%2], 0
  108. jz .skipblock%1
  109. mov r5d, [r1+%1*4]
  110. call add4x4_idct %+ SUFFIX
  111. .skipblock%1:
  112. %if %1<15
  113. add r2, 64
  114. %endif
  115. %endmacro
  116. %macro IDCT_ADD16_10 0
  117. cglobal h264_idct_add16_10, 5,6
  118. ADD16_OP 0, 4+1*8
  119. ADD16_OP 1, 5+1*8
  120. ADD16_OP 2, 4+2*8
  121. ADD16_OP 3, 5+2*8
  122. ADD16_OP 4, 6+1*8
  123. ADD16_OP 5, 7+1*8
  124. ADD16_OP 6, 6+2*8
  125. ADD16_OP 7, 7+2*8
  126. ADD16_OP 8, 4+3*8
  127. ADD16_OP 9, 5+3*8
  128. ADD16_OP 10, 4+4*8
  129. ADD16_OP 11, 5+4*8
  130. ADD16_OP 12, 6+3*8
  131. ADD16_OP 13, 7+3*8
  132. ADD16_OP 14, 6+4*8
  133. ADD16_OP 15, 7+4*8
  134. REP_RET
  135. %endmacro
  136. INIT_XMM sse2
  137. IDCT_ADD16_10
  138. %if HAVE_AVX_EXTERNAL
  139. INIT_XMM avx
  140. IDCT_ADD16_10
  141. %endif
  142. ;-----------------------------------------------------------------------------
  143. ; void h264_idct_dc_add(pixel *dst, dctcoef *block, int stride)
  144. ;-----------------------------------------------------------------------------
  145. %macro IDCT_DC_ADD_OP_10 3
  146. pxor m5, m5
  147. %if avx_enabled
  148. paddw m1, m0, [%1+0 ]
  149. paddw m2, m0, [%1+%2 ]
  150. paddw m3, m0, [%1+%2*2]
  151. paddw m4, m0, [%1+%3 ]
  152. %else
  153. mova m1, [%1+0 ]
  154. mova m2, [%1+%2 ]
  155. mova m3, [%1+%2*2]
  156. mova m4, [%1+%3 ]
  157. paddw m1, m0
  158. paddw m2, m0
  159. paddw m3, m0
  160. paddw m4, m0
  161. %endif
  162. CLIPW m1, m5, m6
  163. CLIPW m2, m5, m6
  164. CLIPW m3, m5, m6
  165. CLIPW m4, m5, m6
  166. mova [%1+0 ], m1
  167. mova [%1+%2 ], m2
  168. mova [%1+%2*2], m3
  169. mova [%1+%3 ], m4
  170. %endmacro
  171. INIT_MMX mmx2
  172. cglobal h264_idct_dc_add_10,3,3
  173. movd m0, [r1]
  174. paddd m0, [pd_32]
  175. psrad m0, 6
  176. lea r1, [r2*3]
  177. pshufw m0, m0, 0
  178. mova m6, [pw_pixel_max]
  179. IDCT_DC_ADD_OP_10 r0, r2, r1
  180. RET
  181. ;-----------------------------------------------------------------------------
  182. ; void h264_idct8_dc_add(pixel *dst, dctcoef *block, int stride)
  183. ;-----------------------------------------------------------------------------
  184. %macro IDCT8_DC_ADD 0
  185. cglobal h264_idct8_dc_add_10,3,3,7
  186. mov r1d, [r1]
  187. add r1, 32
  188. sar r1, 6
  189. movd m0, r1d
  190. lea r1, [r2*3]
  191. SPLATW m0, m0, 0
  192. mova m6, [pw_pixel_max]
  193. IDCT_DC_ADD_OP_10 r0, r2, r1
  194. lea r0, [r0+r2*4]
  195. IDCT_DC_ADD_OP_10 r0, r2, r1
  196. RET
  197. %endmacro
  198. INIT_XMM sse2
  199. IDCT8_DC_ADD
  200. %if HAVE_AVX_EXTERNAL
  201. INIT_XMM avx
  202. IDCT8_DC_ADD
  203. %endif
  204. ;-----------------------------------------------------------------------------
  205. ; h264_idct_add16intra(pixel *dst, const int *block_offset, dctcoef *block, int stride, const uint8_t nnzc[6*8])
  206. ;-----------------------------------------------------------------------------
  207. %macro AC 1
  208. .ac%1:
  209. mov r5d, [r1+(%1+0)*4]
  210. call add4x4_idct %+ SUFFIX
  211. mov r5d, [r1+(%1+1)*4]
  212. add r2, 64
  213. call add4x4_idct %+ SUFFIX
  214. add r2, 64
  215. jmp .skipadd%1
  216. %endmacro
  217. %assign last_block 16
  218. %macro ADD16_OP_INTRA 2
  219. cmp word [r4+%2], 0
  220. jnz .ac%1
  221. mov r5d, [r2+ 0]
  222. or r5d, [r2+64]
  223. jz .skipblock%1
  224. mov r5d, [r1+(%1+0)*4]
  225. call idct_dc_add %+ SUFFIX
  226. .skipblock%1:
  227. %if %1<last_block-2
  228. add r2, 128
  229. %endif
  230. .skipadd%1:
  231. %endmacro
  232. %macro IDCT_ADD16INTRA_10 0
  233. idct_dc_add %+ SUFFIX:
  234. add r5, r0
  235. movq m0, [r2+ 0]
  236. movhps m0, [r2+64]
  237. paddd m0, [pd_32]
  238. psrad m0, 6
  239. pshufhw m0, m0, 0
  240. pshuflw m0, m0, 0
  241. lea r6, [r3*3]
  242. mova m6, [pw_pixel_max]
  243. IDCT_DC_ADD_OP_10 r5, r3, r6
  244. ret
  245. cglobal h264_idct_add16intra_10,5,7,8
  246. ADD16_OP_INTRA 0, 4+1*8
  247. ADD16_OP_INTRA 2, 4+2*8
  248. ADD16_OP_INTRA 4, 6+1*8
  249. ADD16_OP_INTRA 6, 6+2*8
  250. ADD16_OP_INTRA 8, 4+3*8
  251. ADD16_OP_INTRA 10, 4+4*8
  252. ADD16_OP_INTRA 12, 6+3*8
  253. ADD16_OP_INTRA 14, 6+4*8
  254. REP_RET
  255. AC 8
  256. AC 10
  257. AC 12
  258. AC 14
  259. AC 0
  260. AC 2
  261. AC 4
  262. AC 6
  263. %endmacro
  264. INIT_XMM sse2
  265. IDCT_ADD16INTRA_10
  266. %if HAVE_AVX_EXTERNAL
  267. INIT_XMM avx
  268. IDCT_ADD16INTRA_10
  269. %endif
  270. %assign last_block 36
  271. ;-----------------------------------------------------------------------------
  272. ; h264_idct_add8(pixel **dst, const int *block_offset, dctcoef *block, int stride, const uint8_t nnzc[6*8])
  273. ;-----------------------------------------------------------------------------
  274. %macro IDCT_ADD8 0
  275. cglobal h264_idct_add8_10,5,8,7
  276. %if ARCH_X86_64
  277. mov r7, r0
  278. %endif
  279. add r2, 1024
  280. mov r0, [r0]
  281. ADD16_OP_INTRA 16, 4+ 6*8
  282. ADD16_OP_INTRA 18, 4+ 7*8
  283. add r2, 1024-128*2
  284. %if ARCH_X86_64
  285. mov r0, [r7+gprsize]
  286. %else
  287. mov r0, r0m
  288. mov r0, [r0+gprsize]
  289. %endif
  290. ADD16_OP_INTRA 32, 4+11*8
  291. ADD16_OP_INTRA 34, 4+12*8
  292. REP_RET
  293. AC 16
  294. AC 18
  295. AC 32
  296. AC 34
  297. %endmacro ; IDCT_ADD8
  298. INIT_XMM sse2
  299. IDCT_ADD8
  300. %if HAVE_AVX_EXTERNAL
  301. INIT_XMM avx
  302. IDCT_ADD8
  303. %endif
  304. ;-----------------------------------------------------------------------------
  305. ; void h264_idct8_add(pixel *dst, dctcoef *block, int stride)
  306. ;-----------------------------------------------------------------------------
  307. %macro IDCT8_1D 2
  308. SWAP 0, 1
  309. psrad m4, m5, 1
  310. psrad m1, m0, 1
  311. paddd m4, m5
  312. paddd m1, m0
  313. paddd m4, m7
  314. paddd m1, m5
  315. psubd m4, m0
  316. paddd m1, m3
  317. psubd m0, m3
  318. psubd m5, m3
  319. paddd m0, m7
  320. psubd m5, m7
  321. psrad m3, 1
  322. psrad m7, 1
  323. psubd m0, m3
  324. psubd m5, m7
  325. SWAP 1, 7
  326. psrad m1, m7, 2
  327. psrad m3, m4, 2
  328. paddd m3, m0
  329. psrad m0, 2
  330. paddd m1, m5
  331. psrad m5, 2
  332. psubd m0, m4
  333. psubd m7, m5
  334. SWAP 5, 6
  335. psrad m4, m2, 1
  336. psrad m6, m5, 1
  337. psubd m4, m5
  338. paddd m6, m2
  339. mova m2, %1
  340. mova m5, %2
  341. SUMSUB_BA d, 5, 2
  342. SUMSUB_BA d, 6, 5
  343. SUMSUB_BA d, 4, 2
  344. SUMSUB_BA d, 7, 6
  345. SUMSUB_BA d, 0, 4
  346. SUMSUB_BA d, 3, 2
  347. SUMSUB_BA d, 1, 5
  348. SWAP 7, 6, 4, 5, 2, 3, 1, 0 ; 70315246 -> 01234567
  349. %endmacro
  350. %macro IDCT8_1D_FULL 1
  351. mova m7, [%1+112*2]
  352. mova m6, [%1+ 96*2]
  353. mova m5, [%1+ 80*2]
  354. mova m3, [%1+ 48*2]
  355. mova m2, [%1+ 32*2]
  356. mova m1, [%1+ 16*2]
  357. IDCT8_1D [%1], [%1+ 64*2]
  358. %endmacro
  359. ; %1=int16_t *block, %2=int16_t *dstblock
  360. %macro IDCT8_ADD_SSE_START 2
  361. IDCT8_1D_FULL %1
  362. %if ARCH_X86_64
  363. TRANSPOSE4x4D 0,1,2,3,8
  364. mova [%2 ], m0
  365. TRANSPOSE4x4D 4,5,6,7,8
  366. mova [%2+8*2], m4
  367. %else
  368. mova [%1], m7
  369. TRANSPOSE4x4D 0,1,2,3,7
  370. mova m7, [%1]
  371. mova [%2 ], m0
  372. mova [%2+16*2], m1
  373. mova [%2+32*2], m2
  374. mova [%2+48*2], m3
  375. TRANSPOSE4x4D 4,5,6,7,3
  376. mova [%2+ 8*2], m4
  377. mova [%2+24*2], m5
  378. mova [%2+40*2], m6
  379. mova [%2+56*2], m7
  380. %endif
  381. %endmacro
  382. ; %1=uint8_t *dst, %2=int16_t *block, %3=int stride
  383. %macro IDCT8_ADD_SSE_END 3
  384. IDCT8_1D_FULL %2
  385. mova [%2 ], m6
  386. mova [%2+16*2], m7
  387. pxor m7, m7
  388. STORE_DIFFx2 m0, m1, m6, m7, %1, %3
  389. lea %1, [%1+%3*2]
  390. STORE_DIFFx2 m2, m3, m6, m7, %1, %3
  391. mova m0, [%2 ]
  392. mova m1, [%2+16*2]
  393. lea %1, [%1+%3*2]
  394. STORE_DIFFx2 m4, m5, m6, m7, %1, %3
  395. lea %1, [%1+%3*2]
  396. STORE_DIFFx2 m0, m1, m6, m7, %1, %3
  397. %endmacro
  398. %macro IDCT8_ADD 0
  399. cglobal h264_idct8_add_10, 3,4,16
  400. %if UNIX64 == 0
  401. %assign pad 16-gprsize-(stack_offset&15)
  402. sub rsp, pad
  403. call h264_idct8_add1_10 %+ SUFFIX
  404. add rsp, pad
  405. RET
  406. %endif
  407. ALIGN 16
  408. ; TODO: does not need to use stack
  409. h264_idct8_add1_10 %+ SUFFIX:
  410. %assign pad 256+16-gprsize
  411. sub rsp, pad
  412. add dword [r1], 32
  413. %if ARCH_X86_64
  414. IDCT8_ADD_SSE_START r1, rsp
  415. SWAP 1, 9
  416. SWAP 2, 10
  417. SWAP 3, 11
  418. SWAP 5, 13
  419. SWAP 6, 14
  420. SWAP 7, 15
  421. IDCT8_ADD_SSE_START r1+16, rsp+128
  422. PERMUTE 1,9, 2,10, 3,11, 5,1, 6,2, 7,3, 9,13, 10,14, 11,15, 13,5, 14,6, 15,7
  423. IDCT8_1D [rsp], [rsp+128]
  424. SWAP 0, 8
  425. SWAP 1, 9
  426. SWAP 2, 10
  427. SWAP 3, 11
  428. SWAP 4, 12
  429. SWAP 5, 13
  430. SWAP 6, 14
  431. SWAP 7, 15
  432. IDCT8_1D [rsp+16], [rsp+144]
  433. psrad m8, 6
  434. psrad m0, 6
  435. packssdw m8, m0
  436. paddsw m8, [r0]
  437. pxor m0, m0
  438. CLIPW m8, m0, [pw_pixel_max]
  439. mova [r0], m8
  440. mova m8, [pw_pixel_max]
  441. STORE_DIFF16 m9, m1, m0, m8, r0+r2
  442. lea r0, [r0+r2*2]
  443. STORE_DIFF16 m10, m2, m0, m8, r0
  444. STORE_DIFF16 m11, m3, m0, m8, r0+r2
  445. lea r0, [r0+r2*2]
  446. STORE_DIFF16 m12, m4, m0, m8, r0
  447. STORE_DIFF16 m13, m5, m0, m8, r0+r2
  448. lea r0, [r0+r2*2]
  449. STORE_DIFF16 m14, m6, m0, m8, r0
  450. STORE_DIFF16 m15, m7, m0, m8, r0+r2
  451. %else
  452. IDCT8_ADD_SSE_START r1, rsp
  453. IDCT8_ADD_SSE_START r1+16, rsp+128
  454. lea r3, [r0+8]
  455. IDCT8_ADD_SSE_END r0, rsp, r2
  456. IDCT8_ADD_SSE_END r3, rsp+16, r2
  457. %endif ; ARCH_X86_64
  458. add rsp, pad
  459. ret
  460. %endmacro
  461. INIT_XMM sse2
  462. IDCT8_ADD
  463. %if HAVE_AVX_EXTERNAL
  464. INIT_XMM avx
  465. IDCT8_ADD
  466. %endif
  467. ;-----------------------------------------------------------------------------
  468. ; h264_idct8_add4(pixel **dst, const int *block_offset, dctcoef *block, int stride, const uint8_t nnzc[6*8])
  469. ;-----------------------------------------------------------------------------
  470. ;;;;;;; NO FATE SAMPLES TRIGGER THIS
  471. %macro IDCT8_ADD4_OP 2
  472. cmp byte [r4+%2], 0
  473. jz .skipblock%1
  474. mov r0d, [r6+%1*4]
  475. add r0, r5
  476. call h264_idct8_add1_10 %+ SUFFIX
  477. .skipblock%1:
  478. %if %1<12
  479. add r1, 256
  480. %endif
  481. %endmacro
  482. %macro IDCT8_ADD4 0
  483. cglobal h264_idct8_add4_10, 0,7,16
  484. %assign pad 16-gprsize-(stack_offset&15)
  485. SUB rsp, pad
  486. mov r5, r0mp
  487. mov r6, r1mp
  488. mov r1, r2mp
  489. mov r2d, r3m
  490. movifnidn r4, r4mp
  491. IDCT8_ADD4_OP 0, 4+1*8
  492. IDCT8_ADD4_OP 4, 6+1*8
  493. IDCT8_ADD4_OP 8, 4+3*8
  494. IDCT8_ADD4_OP 12, 6+3*8
  495. ADD rsp, pad
  496. RET
  497. %endmacro ; IDCT8_ADD4
  498. INIT_XMM sse2
  499. IDCT8_ADD4
  500. %if HAVE_AVX_EXTERNAL
  501. INIT_XMM avx
  502. IDCT8_ADD4
  503. %endif