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  1. /*
  2. * XVID MPEG-4 VIDEO CODEC
  3. * - SSE2 inverse discrete cosine transform -
  4. *
  5. * Copyright(C) 2003 Pascal Massimino <skal@planet-d.net>
  6. *
  7. * Conversion to gcc syntax with modifications
  8. * by Alexander Strange <astrange@ithinksw.com>
  9. *
  10. * Originally from dct/x86_asm/fdct_sse2_skal.asm in Xvid.
  11. *
  12. * This file is part of FFmpeg.
  13. *
  14. * Vertical pass is an implementation of the scheme:
  15. * Loeffler C., Ligtenberg A., and Moschytz C.S.:
  16. * Practical Fast 1D DCT Algorithm with Eleven Multiplications,
  17. * Proc. ICASSP 1989, 988-991.
  18. *
  19. * Horizontal pass is a double 4x4 vector/matrix multiplication,
  20. * (see also Intel's Application Note 922:
  21. * http://developer.intel.com/vtune/cbts/strmsimd/922down.htm
  22. * Copyright (C) 1999 Intel Corporation)
  23. *
  24. * More details at http://skal.planet-d.net/coding/dct.html
  25. *
  26. * FFmpeg is free software; you can redistribute it and/or
  27. * modify it under the terms of the GNU Lesser General Public
  28. * License as published by the Free Software Foundation; either
  29. * version 2.1 of the License, or (at your option) any later version.
  30. *
  31. * FFmpeg is distributed in the hope that it will be useful,
  32. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  33. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  34. * Lesser General Public License for more details.
  35. *
  36. * You should have received a copy of the GNU Lesser General Public License
  37. * along with FFmpeg; if not, write to the Free Software Foundation,
  38. * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  39. */
  40. #include "libavcodec/dsputil.h"
  41. /*!
  42. * @file idct_sse2_xvid.c
  43. * @brief SSE2 idct compatible with xvidmmx
  44. */
  45. #define X8(x) x,x,x,x,x,x,x,x
  46. #define ROW_SHIFT 11
  47. #define COL_SHIFT 6
  48. DECLARE_ASM_CONST(16, int16_t, tan1[]) = {X8(13036)}; // tan( pi/16)
  49. DECLARE_ASM_CONST(16, int16_t, tan2[]) = {X8(27146)}; // tan(2pi/16) = sqrt(2)-1
  50. DECLARE_ASM_CONST(16, int16_t, tan3[]) = {X8(43790)}; // tan(3pi/16)-1
  51. DECLARE_ASM_CONST(16, int16_t, sqrt2[])= {X8(23170)}; // 0.5/sqrt(2)
  52. DECLARE_ASM_CONST(8, uint8_t, m127[]) = {X8(127)};
  53. DECLARE_ASM_CONST(16, int16_t, iTab1[]) = {
  54. 0x4000, 0x539f, 0xc000, 0xac61, 0x4000, 0xdd5d, 0x4000, 0xdd5d,
  55. 0x4000, 0x22a3, 0x4000, 0x22a3, 0xc000, 0x539f, 0x4000, 0xac61,
  56. 0x3249, 0x11a8, 0x4b42, 0xee58, 0x11a8, 0x4b42, 0x11a8, 0xcdb7,
  57. 0x58c5, 0x4b42, 0xa73b, 0xcdb7, 0x3249, 0xa73b, 0x4b42, 0xa73b
  58. };
  59. DECLARE_ASM_CONST(16, int16_t, iTab2[]) = {
  60. 0x58c5, 0x73fc, 0xa73b, 0x8c04, 0x58c5, 0xcff5, 0x58c5, 0xcff5,
  61. 0x58c5, 0x300b, 0x58c5, 0x300b, 0xa73b, 0x73fc, 0x58c5, 0x8c04,
  62. 0x45bf, 0x187e, 0x6862, 0xe782, 0x187e, 0x6862, 0x187e, 0xba41,
  63. 0x7b21, 0x6862, 0x84df, 0xba41, 0x45bf, 0x84df, 0x6862, 0x84df
  64. };
  65. DECLARE_ASM_CONST(16, int16_t, iTab3[]) = {
  66. 0x539f, 0x6d41, 0xac61, 0x92bf, 0x539f, 0xd2bf, 0x539f, 0xd2bf,
  67. 0x539f, 0x2d41, 0x539f, 0x2d41, 0xac61, 0x6d41, 0x539f, 0x92bf,
  68. 0x41b3, 0x1712, 0x6254, 0xe8ee, 0x1712, 0x6254, 0x1712, 0xbe4d,
  69. 0x73fc, 0x6254, 0x8c04, 0xbe4d, 0x41b3, 0x8c04, 0x6254, 0x8c04
  70. };
  71. DECLARE_ASM_CONST(16, int16_t, iTab4[]) = {
  72. 0x4b42, 0x6254, 0xb4be, 0x9dac, 0x4b42, 0xd746, 0x4b42, 0xd746,
  73. 0x4b42, 0x28ba, 0x4b42, 0x28ba, 0xb4be, 0x6254, 0x4b42, 0x9dac,
  74. 0x3b21, 0x14c3, 0x587e, 0xeb3d, 0x14c3, 0x587e, 0x14c3, 0xc4df,
  75. 0x6862, 0x587e, 0x979e, 0xc4df, 0x3b21, 0x979e, 0x587e, 0x979e
  76. };
  77. DECLARE_ASM_CONST(16, int32_t, walkenIdctRounders[]) = {
  78. 65536, 65536, 65536, 65536,
  79. 3597, 3597, 3597, 3597,
  80. 2260, 2260, 2260, 2260,
  81. 1203, 1203, 1203, 1203,
  82. 120, 120, 120, 120,
  83. 512, 512, 512, 512
  84. };
  85. // Temporary storage before the column pass
  86. #define ROW1 "%%xmm6"
  87. #define ROW3 "%%xmm4"
  88. #define ROW5 "%%xmm5"
  89. #define ROW7 "%%xmm7"
  90. #define CLEAR_ODD(r) "pxor "r","r" \n\t"
  91. #define PUT_ODD(dst) "pshufhw $0x1B, %%xmm2, "dst" \n\t"
  92. #ifdef ARCH_X86_64
  93. # define ROW0 "%%xmm8"
  94. # define REG0 ROW0
  95. # define ROW2 "%%xmm9"
  96. # define REG2 ROW2
  97. # define ROW4 "%%xmm10"
  98. # define REG4 ROW4
  99. # define ROW6 "%%xmm11"
  100. # define REG6 ROW6
  101. # define CLEAR_EVEN(r) CLEAR_ODD(r)
  102. # define PUT_EVEN(dst) PUT_ODD(dst)
  103. # define XMMS "%%xmm12"
  104. # define MOV_32_ONLY "#"
  105. # define SREG2 REG2
  106. # define TAN3 "%%xmm13"
  107. # define TAN1 "%%xmm14"
  108. #else
  109. # define ROW0 "(%0)"
  110. # define REG0 "%%xmm4"
  111. # define ROW2 "2*16(%0)"
  112. # define REG2 "%%xmm4"
  113. # define ROW4 "4*16(%0)"
  114. # define REG4 "%%xmm6"
  115. # define ROW6 "6*16(%0)"
  116. # define REG6 "%%xmm6"
  117. # define CLEAR_EVEN(r)
  118. # define PUT_EVEN(dst) \
  119. "pshufhw $0x1B, %%xmm2, %%xmm2 \n\t" \
  120. "movdqa %%xmm2, "dst" \n\t"
  121. # define XMMS "%%xmm2"
  122. # define MOV_32_ONLY "movdqa "
  123. # define SREG2 "%%xmm7"
  124. # define TAN3 "%%xmm0"
  125. # define TAN1 "%%xmm2"
  126. #endif
  127. #define ROUND(x) "paddd "MANGLE(x)
  128. #define JZ(reg, to) \
  129. "testl "reg","reg" \n\t" \
  130. "jz "to" \n\t"
  131. #define JNZ(reg, to) \
  132. "testl "reg","reg" \n\t" \
  133. "jnz "to" \n\t"
  134. #define TEST_ONE_ROW(src, reg, clear) \
  135. clear \
  136. "movq "src", %%mm1 \n\t" \
  137. "por 8+"src", %%mm1 \n\t" \
  138. "paddusb %%mm0, %%mm1 \n\t" \
  139. "pmovmskb %%mm1, "reg" \n\t"
  140. #define TEST_TWO_ROWS(row1, row2, reg1, reg2, clear1, clear2) \
  141. clear1 \
  142. clear2 \
  143. "movq "row1", %%mm1 \n\t" \
  144. "por 8+"row1", %%mm1 \n\t" \
  145. "movq "row2", %%mm2 \n\t" \
  146. "por 8+"row2", %%mm2 \n\t" \
  147. "paddusb %%mm0, %%mm1 \n\t" \
  148. "paddusb %%mm0, %%mm2 \n\t" \
  149. "pmovmskb %%mm1, "reg1" \n\t" \
  150. "pmovmskb %%mm2, "reg2" \n\t"
  151. ///IDCT pass on rows.
  152. #define iMTX_MULT(src, table, rounder, put) \
  153. "movdqa "src", %%xmm3 \n\t" \
  154. "movdqa %%xmm3, %%xmm0 \n\t" \
  155. "pshufd $0x11, %%xmm3, %%xmm1 \n\t" /* 4602 */ \
  156. "punpcklqdq %%xmm0, %%xmm0 \n\t" /* 0246 */ \
  157. "pmaddwd "table", %%xmm0 \n\t" \
  158. "pmaddwd 16+"table", %%xmm1 \n\t" \
  159. "pshufd $0xBB, %%xmm3, %%xmm2 \n\t" /* 5713 */ \
  160. "punpckhqdq %%xmm3, %%xmm3 \n\t" /* 1357 */ \
  161. "pmaddwd 32+"table", %%xmm2 \n\t" \
  162. "pmaddwd 48+"table", %%xmm3 \n\t" \
  163. "paddd %%xmm1, %%xmm0 \n\t" \
  164. "paddd %%xmm3, %%xmm2 \n\t" \
  165. rounder", %%xmm0 \n\t" \
  166. "movdqa %%xmm2, %%xmm3 \n\t" \
  167. "paddd %%xmm0, %%xmm2 \n\t" \
  168. "psubd %%xmm3, %%xmm0 \n\t" \
  169. "psrad $11, %%xmm2 \n\t" \
  170. "psrad $11, %%xmm0 \n\t" \
  171. "packssdw %%xmm0, %%xmm2 \n\t" \
  172. put \
  173. "1: \n\t"
  174. #define iLLM_HEAD \
  175. "movdqa "MANGLE(tan3)", "TAN3" \n\t" \
  176. "movdqa "MANGLE(tan1)", "TAN1" \n\t" \
  177. ///IDCT pass on columns.
  178. #define iLLM_PASS(dct) \
  179. "movdqa "TAN3", %%xmm1 \n\t" \
  180. "movdqa "TAN1", %%xmm3 \n\t" \
  181. "pmulhw %%xmm4, "TAN3" \n\t" \
  182. "pmulhw %%xmm5, %%xmm1 \n\t" \
  183. "paddsw %%xmm4, "TAN3" \n\t" \
  184. "paddsw %%xmm5, %%xmm1 \n\t" \
  185. "psubsw %%xmm5, "TAN3" \n\t" \
  186. "paddsw %%xmm4, %%xmm1 \n\t" \
  187. "pmulhw %%xmm7, %%xmm3 \n\t" \
  188. "pmulhw %%xmm6, "TAN1" \n\t" \
  189. "paddsw %%xmm6, %%xmm3 \n\t" \
  190. "psubsw %%xmm7, "TAN1" \n\t" \
  191. "movdqa %%xmm3, %%xmm7 \n\t" \
  192. "movdqa "TAN1", %%xmm6 \n\t" \
  193. "psubsw %%xmm1, %%xmm3 \n\t" \
  194. "psubsw "TAN3", "TAN1" \n\t" \
  195. "paddsw %%xmm7, %%xmm1 \n\t" \
  196. "paddsw %%xmm6, "TAN3" \n\t" \
  197. "movdqa %%xmm3, %%xmm6 \n\t" \
  198. "psubsw "TAN3", %%xmm3 \n\t" \
  199. "paddsw %%xmm6, "TAN3" \n\t" \
  200. "movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
  201. "pmulhw %%xmm4, %%xmm3 \n\t" \
  202. "pmulhw %%xmm4, "TAN3" \n\t" \
  203. "paddsw "TAN3", "TAN3" \n\t" \
  204. "paddsw %%xmm3, %%xmm3 \n\t" \
  205. "movdqa "MANGLE(tan2)", %%xmm7 \n\t" \
  206. MOV_32_ONLY ROW2", "REG2" \n\t" \
  207. MOV_32_ONLY ROW6", "REG6" \n\t" \
  208. "movdqa %%xmm7, %%xmm5 \n\t" \
  209. "pmulhw "REG6", %%xmm7 \n\t" \
  210. "pmulhw "REG2", %%xmm5 \n\t" \
  211. "paddsw "REG2", %%xmm7 \n\t" \
  212. "psubsw "REG6", %%xmm5 \n\t" \
  213. MOV_32_ONLY ROW0", "REG0" \n\t" \
  214. MOV_32_ONLY ROW4", "REG4" \n\t" \
  215. MOV_32_ONLY" "TAN1", (%0) \n\t" \
  216. "movdqa "REG0", "XMMS" \n\t" \
  217. "psubsw "REG4", "REG0" \n\t" \
  218. "paddsw "XMMS", "REG4" \n\t" \
  219. "movdqa "REG4", "XMMS" \n\t" \
  220. "psubsw %%xmm7, "REG4" \n\t" \
  221. "paddsw "XMMS", %%xmm7 \n\t" \
  222. "movdqa "REG0", "XMMS" \n\t" \
  223. "psubsw %%xmm5, "REG0" \n\t" \
  224. "paddsw "XMMS", %%xmm5 \n\t" \
  225. "movdqa %%xmm5, "XMMS" \n\t" \
  226. "psubsw "TAN3", %%xmm5 \n\t" \
  227. "paddsw "XMMS", "TAN3" \n\t" \
  228. "movdqa "REG0", "XMMS" \n\t" \
  229. "psubsw %%xmm3, "REG0" \n\t" \
  230. "paddsw "XMMS", %%xmm3 \n\t" \
  231. MOV_32_ONLY" (%0), "TAN1" \n\t" \
  232. "psraw $6, %%xmm5 \n\t" \
  233. "psraw $6, "REG0" \n\t" \
  234. "psraw $6, "TAN3" \n\t" \
  235. "psraw $6, %%xmm3 \n\t" \
  236. "movdqa "TAN3", 1*16("dct") \n\t" \
  237. "movdqa %%xmm3, 2*16("dct") \n\t" \
  238. "movdqa "REG0", 5*16("dct") \n\t" \
  239. "movdqa %%xmm5, 6*16("dct") \n\t" \
  240. "movdqa %%xmm7, %%xmm0 \n\t" \
  241. "movdqa "REG4", %%xmm4 \n\t" \
  242. "psubsw %%xmm1, %%xmm7 \n\t" \
  243. "psubsw "TAN1", "REG4" \n\t" \
  244. "paddsw %%xmm0, %%xmm1 \n\t" \
  245. "paddsw %%xmm4, "TAN1" \n\t" \
  246. "psraw $6, %%xmm1 \n\t" \
  247. "psraw $6, %%xmm7 \n\t" \
  248. "psraw $6, "TAN1" \n\t" \
  249. "psraw $6, "REG4" \n\t" \
  250. "movdqa %%xmm1, ("dct") \n\t" \
  251. "movdqa "TAN1", 3*16("dct") \n\t" \
  252. "movdqa "REG4", 4*16("dct") \n\t" \
  253. "movdqa %%xmm7, 7*16("dct") \n\t"
  254. ///IDCT pass on columns, assuming rows 4-7 are zero.
  255. #define iLLM_PASS_SPARSE(dct) \
  256. "pmulhw %%xmm4, "TAN3" \n\t" \
  257. "paddsw %%xmm4, "TAN3" \n\t" \
  258. "movdqa %%xmm6, %%xmm3 \n\t" \
  259. "pmulhw %%xmm6, "TAN1" \n\t" \
  260. "movdqa %%xmm4, %%xmm1 \n\t" \
  261. "psubsw %%xmm1, %%xmm3 \n\t" \
  262. "paddsw %%xmm6, %%xmm1 \n\t" \
  263. "movdqa "TAN1", %%xmm6 \n\t" \
  264. "psubsw "TAN3", "TAN1" \n\t" \
  265. "paddsw %%xmm6, "TAN3" \n\t" \
  266. "movdqa %%xmm3, %%xmm6 \n\t" \
  267. "psubsw "TAN3", %%xmm3 \n\t" \
  268. "paddsw %%xmm6, "TAN3" \n\t" \
  269. "movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
  270. "pmulhw %%xmm4, %%xmm3 \n\t" \
  271. "pmulhw %%xmm4, "TAN3" \n\t" \
  272. "paddsw "TAN3", "TAN3" \n\t" \
  273. "paddsw %%xmm3, %%xmm3 \n\t" \
  274. "movdqa "MANGLE(tan2)", %%xmm5 \n\t" \
  275. MOV_32_ONLY ROW2", "SREG2" \n\t" \
  276. "pmulhw "SREG2", %%xmm5 \n\t" \
  277. MOV_32_ONLY ROW0", "REG0" \n\t" \
  278. "movdqa "REG0", %%xmm6 \n\t" \
  279. "psubsw "SREG2", %%xmm6 \n\t" \
  280. "paddsw "REG0", "SREG2" \n\t" \
  281. MOV_32_ONLY" "TAN1", (%0) \n\t" \
  282. "movdqa "REG0", "XMMS" \n\t" \
  283. "psubsw %%xmm5, "REG0" \n\t" \
  284. "paddsw "XMMS", %%xmm5 \n\t" \
  285. "movdqa %%xmm5, "XMMS" \n\t" \
  286. "psubsw "TAN3", %%xmm5 \n\t" \
  287. "paddsw "XMMS", "TAN3" \n\t" \
  288. "movdqa "REG0", "XMMS" \n\t" \
  289. "psubsw %%xmm3, "REG0" \n\t" \
  290. "paddsw "XMMS", %%xmm3 \n\t" \
  291. MOV_32_ONLY" (%0), "TAN1" \n\t" \
  292. "psraw $6, %%xmm5 \n\t" \
  293. "psraw $6, "REG0" \n\t" \
  294. "psraw $6, "TAN3" \n\t" \
  295. "psraw $6, %%xmm3 \n\t" \
  296. "movdqa "TAN3", 1*16("dct") \n\t" \
  297. "movdqa %%xmm3, 2*16("dct") \n\t" \
  298. "movdqa "REG0", 5*16("dct") \n\t" \
  299. "movdqa %%xmm5, 6*16("dct") \n\t" \
  300. "movdqa "SREG2", %%xmm0 \n\t" \
  301. "movdqa %%xmm6, %%xmm4 \n\t" \
  302. "psubsw %%xmm1, "SREG2" \n\t" \
  303. "psubsw "TAN1", %%xmm6 \n\t" \
  304. "paddsw %%xmm0, %%xmm1 \n\t" \
  305. "paddsw %%xmm4, "TAN1" \n\t" \
  306. "psraw $6, %%xmm1 \n\t" \
  307. "psraw $6, "SREG2" \n\t" \
  308. "psraw $6, "TAN1" \n\t" \
  309. "psraw $6, %%xmm6 \n\t" \
  310. "movdqa %%xmm1, ("dct") \n\t" \
  311. "movdqa "TAN1", 3*16("dct") \n\t" \
  312. "movdqa %%xmm6, 4*16("dct") \n\t" \
  313. "movdqa "SREG2", 7*16("dct") \n\t"
  314. inline void ff_idct_xvid_sse2(short *block)
  315. {
  316. asm volatile(
  317. "movq "MANGLE(m127)", %%mm0 \n\t"
  318. iMTX_MULT("(%0)", MANGLE(iTab1), ROUND(walkenIdctRounders), PUT_EVEN(ROW0))
  319. iMTX_MULT("1*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+1*16), PUT_ODD(ROW1))
  320. iMTX_MULT("2*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+2*16), PUT_EVEN(ROW2))
  321. TEST_TWO_ROWS("3*16(%0)", "4*16(%0)", "%%eax", "%%ecx", CLEAR_ODD(ROW3), CLEAR_EVEN(ROW4))
  322. JZ("%%eax", "1f")
  323. iMTX_MULT("3*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+3*16), PUT_ODD(ROW3))
  324. TEST_TWO_ROWS("5*16(%0)", "6*16(%0)", "%%eax", "%%edx", CLEAR_ODD(ROW5), CLEAR_EVEN(ROW6))
  325. TEST_ONE_ROW("7*16(%0)", "%%esi", CLEAR_ODD(ROW7))
  326. iLLM_HEAD
  327. ASMALIGN(4)
  328. JNZ("%%ecx", "2f")
  329. JNZ("%%eax", "3f")
  330. JNZ("%%edx", "4f")
  331. JNZ("%%esi", "5f")
  332. iLLM_PASS_SPARSE("%0")
  333. "jmp 6f \n\t"
  334. "2: \n\t"
  335. iMTX_MULT("4*16(%0)", MANGLE(iTab1), "#", PUT_EVEN(ROW4))
  336. "3: \n\t"
  337. iMTX_MULT("5*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+4*16), PUT_ODD(ROW5))
  338. JZ("%%edx", "1f")
  339. "4: \n\t"
  340. iMTX_MULT("6*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+5*16), PUT_EVEN(ROW6))
  341. JZ("%%esi", "1f")
  342. "5: \n\t"
  343. iMTX_MULT("7*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+5*16), PUT_ODD(ROW7))
  344. #ifndef ARCH_X86_64
  345. iLLM_HEAD
  346. #endif
  347. iLLM_PASS("%0")
  348. "6: \n\t"
  349. : "+r"(block)
  350. :
  351. : "%eax", "%ecx", "%edx", "%esi", "memory");
  352. }
  353. void ff_idct_xvid_sse2_put(uint8_t *dest, int line_size, short *block)
  354. {
  355. ff_idct_xvid_sse2(block);
  356. put_pixels_clamped_mmx(block, dest, line_size);
  357. }
  358. void ff_idct_xvid_sse2_add(uint8_t *dest, int line_size, short *block)
  359. {
  360. ff_idct_xvid_sse2(block);
  361. add_pixels_clamped_mmx(block, dest, line_size);
  362. }