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  1. /*
  2. * MMX optimized motion estimation
  3. * Copyright (c) 2001 Fabrice Bellard
  4. * Copyright (c) 2002-2004 Michael Niedermayer
  5. *
  6. * mostly by Michael Niedermayer <michaelni@gmx.at>
  7. *
  8. * This file is part of Libav.
  9. *
  10. * Libav is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU Lesser General Public
  12. * License as published by the Free Software Foundation; either
  13. * version 2.1 of the License, or (at your option) any later version.
  14. *
  15. * Libav is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * Lesser General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU Lesser General Public
  21. * License along with Libav; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  23. */
  24. #include "libavutil/attributes.h"
  25. #include "libavutil/internal.h"
  26. #include "libavutil/mem.h"
  27. #include "libavutil/x86/asm.h"
  28. #include "libavutil/x86/cpu.h"
  29. #include "dsputil_x86.h"
  30. #if HAVE_INLINE_ASM
  31. DECLARE_ASM_CONST(8, uint64_t, round_tab)[3] = {
  32. 0x0000000000000000ULL,
  33. 0x0001000100010001ULL,
  34. 0x0002000200020002ULL,
  35. };
  36. DECLARE_ASM_CONST(8, uint64_t, bone) = 0x0101010101010101LL;
  37. static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
  38. {
  39. x86_reg len = -(stride * h);
  40. __asm__ volatile (
  41. ".p2align 4 \n\t"
  42. "1: \n\t"
  43. "movq (%1, %%"REG_a"), %%mm0 \n\t"
  44. "movq (%2, %%"REG_a"), %%mm2 \n\t"
  45. "movq (%2, %%"REG_a"), %%mm4 \n\t"
  46. "add %3, %%"REG_a" \n\t"
  47. "psubusb %%mm0, %%mm2 \n\t"
  48. "psubusb %%mm4, %%mm0 \n\t"
  49. "movq (%1, %%"REG_a"), %%mm1 \n\t"
  50. "movq (%2, %%"REG_a"), %%mm3 \n\t"
  51. "movq (%2, %%"REG_a"), %%mm5 \n\t"
  52. "psubusb %%mm1, %%mm3 \n\t"
  53. "psubusb %%mm5, %%mm1 \n\t"
  54. "por %%mm2, %%mm0 \n\t"
  55. "por %%mm1, %%mm3 \n\t"
  56. "movq %%mm0, %%mm1 \n\t"
  57. "movq %%mm3, %%mm2 \n\t"
  58. "punpcklbw %%mm7, %%mm0 \n\t"
  59. "punpckhbw %%mm7, %%mm1 \n\t"
  60. "punpcklbw %%mm7, %%mm3 \n\t"
  61. "punpckhbw %%mm7, %%mm2 \n\t"
  62. "paddw %%mm1, %%mm0 \n\t"
  63. "paddw %%mm3, %%mm2 \n\t"
  64. "paddw %%mm2, %%mm0 \n\t"
  65. "paddw %%mm0, %%mm6 \n\t"
  66. "add %3, %%"REG_a" \n\t"
  67. " js 1b \n\t"
  68. : "+a" (len)
  69. : "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg) stride));
  70. }
  71. static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2,
  72. int stride, int h)
  73. {
  74. __asm__ volatile (
  75. ".p2align 4 \n\t"
  76. "1: \n\t"
  77. "movq (%1), %%mm0 \n\t"
  78. "movq (%1, %3), %%mm1 \n\t"
  79. "psadbw (%2), %%mm0 \n\t"
  80. "psadbw (%2, %3), %%mm1 \n\t"
  81. "paddw %%mm0, %%mm6 \n\t"
  82. "paddw %%mm1, %%mm6 \n\t"
  83. "lea (%1,%3,2), %1 \n\t"
  84. "lea (%2,%3,2), %2 \n\t"
  85. "sub $2, %0 \n\t"
  86. " jg 1b \n\t"
  87. : "+r" (h), "+r" (blk1), "+r" (blk2)
  88. : "r" ((x86_reg) stride));
  89. }
  90. static int sad16_sse2(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)
  91. {
  92. int ret;
  93. __asm__ volatile (
  94. "pxor %%xmm2, %%xmm2 \n\t"
  95. ".p2align 4 \n\t"
  96. "1: \n\t"
  97. "movdqu (%1), %%xmm0 \n\t"
  98. "movdqu (%1, %4), %%xmm1 \n\t"
  99. "psadbw (%2), %%xmm0 \n\t"
  100. "psadbw (%2, %4), %%xmm1 \n\t"
  101. "paddw %%xmm0, %%xmm2 \n\t"
  102. "paddw %%xmm1, %%xmm2 \n\t"
  103. "lea (%1,%4,2), %1 \n\t"
  104. "lea (%2,%4,2), %2 \n\t"
  105. "sub $2, %0 \n\t"
  106. " jg 1b \n\t"
  107. "movhlps %%xmm2, %%xmm0 \n\t"
  108. "paddw %%xmm0, %%xmm2 \n\t"
  109. "movd %%xmm2, %3 \n\t"
  110. : "+r" (h), "+r" (blk1), "+r" (blk2), "=r" (ret)
  111. : "r" ((x86_reg) stride));
  112. return ret;
  113. }
  114. static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2,
  115. int stride, int h)
  116. {
  117. __asm__ volatile (
  118. ".p2align 4 \n\t"
  119. "1: \n\t"
  120. "movq (%1), %%mm0 \n\t"
  121. "movq (%1, %3), %%mm1 \n\t"
  122. "pavgb 1(%1), %%mm0 \n\t"
  123. "pavgb 1(%1, %3), %%mm1 \n\t"
  124. "psadbw (%2), %%mm0 \n\t"
  125. "psadbw (%2, %3), %%mm1 \n\t"
  126. "paddw %%mm0, %%mm6 \n\t"
  127. "paddw %%mm1, %%mm6 \n\t"
  128. "lea (%1,%3,2), %1 \n\t"
  129. "lea (%2,%3,2), %2 \n\t"
  130. "sub $2, %0 \n\t"
  131. " jg 1b \n\t"
  132. : "+r" (h), "+r" (blk1), "+r" (blk2)
  133. : "r" ((x86_reg) stride));
  134. }
  135. static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2,
  136. int stride, int h)
  137. {
  138. __asm__ volatile (
  139. "movq (%1), %%mm0 \n\t"
  140. "add %3, %1 \n\t"
  141. ".p2align 4 \n\t"
  142. "1: \n\t"
  143. "movq (%1), %%mm1 \n\t"
  144. "movq (%1, %3), %%mm2 \n\t"
  145. "pavgb %%mm1, %%mm0 \n\t"
  146. "pavgb %%mm2, %%mm1 \n\t"
  147. "psadbw (%2), %%mm0 \n\t"
  148. "psadbw (%2, %3), %%mm1 \n\t"
  149. "paddw %%mm0, %%mm6 \n\t"
  150. "paddw %%mm1, %%mm6 \n\t"
  151. "movq %%mm2, %%mm0 \n\t"
  152. "lea (%1,%3,2), %1 \n\t"
  153. "lea (%2,%3,2), %2 \n\t"
  154. "sub $2, %0 \n\t"
  155. " jg 1b \n\t"
  156. : "+r" (h), "+r" (blk1), "+r" (blk2)
  157. : "r" ((x86_reg) stride));
  158. }
  159. static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2,
  160. int stride, int h)
  161. {
  162. __asm__ volatile (
  163. "movq "MANGLE(bone)", %%mm5 \n\t"
  164. "movq (%1), %%mm0 \n\t"
  165. "pavgb 1(%1), %%mm0 \n\t"
  166. "add %3, %1 \n\t"
  167. ".p2align 4 \n\t"
  168. "1: \n\t"
  169. "movq (%1), %%mm1 \n\t"
  170. "movq (%1,%3), %%mm2 \n\t"
  171. "pavgb 1(%1), %%mm1 \n\t"
  172. "pavgb 1(%1,%3), %%mm2 \n\t"
  173. "psubusb %%mm5, %%mm1 \n\t"
  174. "pavgb %%mm1, %%mm0 \n\t"
  175. "pavgb %%mm2, %%mm1 \n\t"
  176. "psadbw (%2), %%mm0 \n\t"
  177. "psadbw (%2,%3), %%mm1 \n\t"
  178. "paddw %%mm0, %%mm6 \n\t"
  179. "paddw %%mm1, %%mm6 \n\t"
  180. "movq %%mm2, %%mm0 \n\t"
  181. "lea (%1,%3,2), %1 \n\t"
  182. "lea (%2,%3,2), %2 \n\t"
  183. "sub $2, %0 \n\t"
  184. " jg 1b \n\t"
  185. : "+r" (h), "+r" (blk1), "+r" (blk2)
  186. : "r" ((x86_reg) stride));
  187. }
  188. static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2,
  189. int stride, int h)
  190. {
  191. x86_reg len = -(stride * h);
  192. __asm__ volatile (
  193. ".p2align 4 \n\t"
  194. "1: \n\t"
  195. "movq (%1, %%"REG_a"), %%mm0 \n\t"
  196. "movq (%2, %%"REG_a"), %%mm1 \n\t"
  197. "movq (%1, %%"REG_a"), %%mm2 \n\t"
  198. "movq (%2, %%"REG_a"), %%mm3 \n\t"
  199. "punpcklbw %%mm7, %%mm0 \n\t"
  200. "punpcklbw %%mm7, %%mm1 \n\t"
  201. "punpckhbw %%mm7, %%mm2 \n\t"
  202. "punpckhbw %%mm7, %%mm3 \n\t"
  203. "paddw %%mm0, %%mm1 \n\t"
  204. "paddw %%mm2, %%mm3 \n\t"
  205. "movq (%3, %%"REG_a"), %%mm4 \n\t"
  206. "movq (%3, %%"REG_a"), %%mm2 \n\t"
  207. "paddw %%mm5, %%mm1 \n\t"
  208. "paddw %%mm5, %%mm3 \n\t"
  209. "psrlw $1, %%mm1 \n\t"
  210. "psrlw $1, %%mm3 \n\t"
  211. "packuswb %%mm3, %%mm1 \n\t"
  212. "psubusb %%mm1, %%mm4 \n\t"
  213. "psubusb %%mm2, %%mm1 \n\t"
  214. "por %%mm4, %%mm1 \n\t"
  215. "movq %%mm1, %%mm0 \n\t"
  216. "punpcklbw %%mm7, %%mm0 \n\t"
  217. "punpckhbw %%mm7, %%mm1 \n\t"
  218. "paddw %%mm1, %%mm0 \n\t"
  219. "paddw %%mm0, %%mm6 \n\t"
  220. "add %4, %%"REG_a" \n\t"
  221. " js 1b \n\t"
  222. : "+a" (len)
  223. : "r" (blk1a - len), "r" (blk1b - len), "r" (blk2 - len),
  224. "r" ((x86_reg) stride));
  225. }
  226. static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
  227. {
  228. x86_reg len = -(stride * h);
  229. __asm__ volatile (
  230. "movq (%1, %%"REG_a"), %%mm0 \n\t"
  231. "movq 1(%1, %%"REG_a"), %%mm2 \n\t"
  232. "movq %%mm0, %%mm1 \n\t"
  233. "movq %%mm2, %%mm3 \n\t"
  234. "punpcklbw %%mm7, %%mm0 \n\t"
  235. "punpckhbw %%mm7, %%mm1 \n\t"
  236. "punpcklbw %%mm7, %%mm2 \n\t"
  237. "punpckhbw %%mm7, %%mm3 \n\t"
  238. "paddw %%mm2, %%mm0 \n\t"
  239. "paddw %%mm3, %%mm1 \n\t"
  240. ".p2align 4 \n\t"
  241. "1: \n\t"
  242. "movq (%2, %%"REG_a"), %%mm2 \n\t"
  243. "movq 1(%2, %%"REG_a"), %%mm4 \n\t"
  244. "movq %%mm2, %%mm3 \n\t"
  245. "movq %%mm4, %%mm5 \n\t"
  246. "punpcklbw %%mm7, %%mm2 \n\t"
  247. "punpckhbw %%mm7, %%mm3 \n\t"
  248. "punpcklbw %%mm7, %%mm4 \n\t"
  249. "punpckhbw %%mm7, %%mm5 \n\t"
  250. "paddw %%mm4, %%mm2 \n\t"
  251. "paddw %%mm5, %%mm3 \n\t"
  252. "movq 16+"MANGLE(round_tab)", %%mm5 \n\t"
  253. "paddw %%mm2, %%mm0 \n\t"
  254. "paddw %%mm3, %%mm1 \n\t"
  255. "paddw %%mm5, %%mm0 \n\t"
  256. "paddw %%mm5, %%mm1 \n\t"
  257. "movq (%3, %%"REG_a"), %%mm4 \n\t"
  258. "movq (%3, %%"REG_a"), %%mm5 \n\t"
  259. "psrlw $2, %%mm0 \n\t"
  260. "psrlw $2, %%mm1 \n\t"
  261. "packuswb %%mm1, %%mm0 \n\t"
  262. "psubusb %%mm0, %%mm4 \n\t"
  263. "psubusb %%mm5, %%mm0 \n\t"
  264. "por %%mm4, %%mm0 \n\t"
  265. "movq %%mm0, %%mm4 \n\t"
  266. "punpcklbw %%mm7, %%mm0 \n\t"
  267. "punpckhbw %%mm7, %%mm4 \n\t"
  268. "paddw %%mm0, %%mm6 \n\t"
  269. "paddw %%mm4, %%mm6 \n\t"
  270. "movq %%mm2, %%mm0 \n\t"
  271. "movq %%mm3, %%mm1 \n\t"
  272. "add %4, %%"REG_a" \n\t"
  273. " js 1b \n\t"
  274. : "+a" (len)
  275. : "r" (blk1 - len), "r" (blk1 - len + stride), "r" (blk2 - len),
  276. "r" ((x86_reg) stride));
  277. }
  278. static inline int sum_mmx(void)
  279. {
  280. int ret;
  281. __asm__ volatile (
  282. "movq %%mm6, %%mm0 \n\t"
  283. "psrlq $32, %%mm6 \n\t"
  284. "paddw %%mm0, %%mm6 \n\t"
  285. "movq %%mm6, %%mm0 \n\t"
  286. "psrlq $16, %%mm6 \n\t"
  287. "paddw %%mm0, %%mm6 \n\t"
  288. "movd %%mm6, %0 \n\t"
  289. : "=r" (ret));
  290. return ret & 0xFFFF;
  291. }
  292. static inline int sum_mmxext(void)
  293. {
  294. int ret;
  295. __asm__ volatile (
  296. "movd %%mm6, %0 \n\t"
  297. : "=r" (ret));
  298. return ret;
  299. }
  300. static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
  301. {
  302. sad8_2_mmx(blk1, blk1 + 1, blk2, stride, h);
  303. }
  304. static inline void sad8_y2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
  305. {
  306. sad8_2_mmx(blk1, blk1 + stride, blk2, stride, h);
  307. }
  308. #define PIX_SAD(suf) \
  309. static int sad8_ ## suf(void *v, uint8_t *blk2, \
  310. uint8_t *blk1, int stride, int h) \
  311. { \
  312. assert(h == 8); \
  313. __asm__ volatile ( \
  314. "pxor %%mm7, %%mm7 \n\t" \
  315. "pxor %%mm6, %%mm6 \n\t" \
  316. :); \
  317. \
  318. sad8_1_ ## suf(blk1, blk2, stride, 8); \
  319. \
  320. return sum_ ## suf(); \
  321. } \
  322. \
  323. static int sad8_x2_ ## suf(void *v, uint8_t *blk2, \
  324. uint8_t *blk1, int stride, int h) \
  325. { \
  326. assert(h == 8); \
  327. __asm__ volatile ( \
  328. "pxor %%mm7, %%mm7 \n\t" \
  329. "pxor %%mm6, %%mm6 \n\t" \
  330. "movq %0, %%mm5 \n\t" \
  331. :: "m" (round_tab[1])); \
  332. \
  333. sad8_x2a_ ## suf(blk1, blk2, stride, 8); \
  334. \
  335. return sum_ ## suf(); \
  336. } \
  337. \
  338. static int sad8_y2_ ## suf(void *v, uint8_t *blk2, \
  339. uint8_t *blk1, int stride, int h) \
  340. { \
  341. assert(h == 8); \
  342. __asm__ volatile ( \
  343. "pxor %%mm7, %%mm7 \n\t" \
  344. "pxor %%mm6, %%mm6 \n\t" \
  345. "movq %0, %%mm5 \n\t" \
  346. :: "m" (round_tab[1])); \
  347. \
  348. sad8_y2a_ ## suf(blk1, blk2, stride, 8); \
  349. \
  350. return sum_ ## suf(); \
  351. } \
  352. \
  353. static int sad8_xy2_ ## suf(void *v, uint8_t *blk2, \
  354. uint8_t *blk1, int stride, int h) \
  355. { \
  356. assert(h == 8); \
  357. __asm__ volatile ( \
  358. "pxor %%mm7, %%mm7 \n\t" \
  359. "pxor %%mm6, %%mm6 \n\t" \
  360. ::); \
  361. \
  362. sad8_4_ ## suf(blk1, blk2, stride, 8); \
  363. \
  364. return sum_ ## suf(); \
  365. } \
  366. \
  367. static int sad16_ ## suf(void *v, uint8_t *blk2, \
  368. uint8_t *blk1, int stride, int h) \
  369. { \
  370. __asm__ volatile ( \
  371. "pxor %%mm7, %%mm7 \n\t" \
  372. "pxor %%mm6, %%mm6 \n\t" \
  373. :); \
  374. \
  375. sad8_1_ ## suf(blk1, blk2, stride, h); \
  376. sad8_1_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
  377. \
  378. return sum_ ## suf(); \
  379. } \
  380. \
  381. static int sad16_x2_ ## suf(void *v, uint8_t *blk2, \
  382. uint8_t *blk1, int stride, int h) \
  383. { \
  384. __asm__ volatile ( \
  385. "pxor %%mm7, %%mm7 \n\t" \
  386. "pxor %%mm6, %%mm6 \n\t" \
  387. "movq %0, %%mm5 \n\t" \
  388. :: "m" (round_tab[1])); \
  389. \
  390. sad8_x2a_ ## suf(blk1, blk2, stride, h); \
  391. sad8_x2a_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
  392. \
  393. return sum_ ## suf(); \
  394. } \
  395. \
  396. static int sad16_y2_ ## suf(void *v, uint8_t *blk2, \
  397. uint8_t *blk1, int stride, int h) \
  398. { \
  399. __asm__ volatile ( \
  400. "pxor %%mm7, %%mm7 \n\t" \
  401. "pxor %%mm6, %%mm6 \n\t" \
  402. "movq %0, %%mm5 \n\t" \
  403. :: "m" (round_tab[1])); \
  404. \
  405. sad8_y2a_ ## suf(blk1, blk2, stride, h); \
  406. sad8_y2a_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
  407. \
  408. return sum_ ## suf(); \
  409. } \
  410. \
  411. static int sad16_xy2_ ## suf(void *v, uint8_t *blk2, \
  412. uint8_t *blk1, int stride, int h) \
  413. { \
  414. __asm__ volatile ( \
  415. "pxor %%mm7, %%mm7 \n\t" \
  416. "pxor %%mm6, %%mm6 \n\t" \
  417. ::); \
  418. \
  419. sad8_4_ ## suf(blk1, blk2, stride, h); \
  420. sad8_4_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
  421. \
  422. return sum_ ## suf(); \
  423. } \
  424. PIX_SAD(mmx)
  425. PIX_SAD(mmxext)
  426. #endif /* HAVE_INLINE_ASM */
  427. av_cold void ff_dsputil_init_pix_mmx(DSPContext *c, AVCodecContext *avctx)
  428. {
  429. #if HAVE_INLINE_ASM
  430. int cpu_flags = av_get_cpu_flags();
  431. if (INLINE_MMX(cpu_flags)) {
  432. c->pix_abs[0][0] = sad16_mmx;
  433. c->pix_abs[0][1] = sad16_x2_mmx;
  434. c->pix_abs[0][2] = sad16_y2_mmx;
  435. c->pix_abs[0][3] = sad16_xy2_mmx;
  436. c->pix_abs[1][0] = sad8_mmx;
  437. c->pix_abs[1][1] = sad8_x2_mmx;
  438. c->pix_abs[1][2] = sad8_y2_mmx;
  439. c->pix_abs[1][3] = sad8_xy2_mmx;
  440. c->sad[0] = sad16_mmx;
  441. c->sad[1] = sad8_mmx;
  442. }
  443. if (INLINE_MMXEXT(cpu_flags)) {
  444. c->pix_abs[0][0] = sad16_mmxext;
  445. c->pix_abs[1][0] = sad8_mmxext;
  446. c->sad[0] = sad16_mmxext;
  447. c->sad[1] = sad8_mmxext;
  448. if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
  449. c->pix_abs[0][1] = sad16_x2_mmxext;
  450. c->pix_abs[0][2] = sad16_y2_mmxext;
  451. c->pix_abs[0][3] = sad16_xy2_mmxext;
  452. c->pix_abs[1][1] = sad8_x2_mmxext;
  453. c->pix_abs[1][2] = sad8_y2_mmxext;
  454. c->pix_abs[1][3] = sad8_xy2_mmxext;
  455. }
  456. }
  457. if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_3DNOW)) {
  458. c->sad[0] = sad16_sse2;
  459. }
  460. #endif /* HAVE_INLINE_ASM */
  461. }