5 Commits (92ef4be4ab9fbb7d901b22e0036a4ca90b00a476)

Author SHA1 Message Date
  Christophe GISQUET 2130bd8f5b rv40dsp x86: use only one register, for both increment and loop counter 13 years ago
  Christophe GISQUET 272b252c01 rv40dsp: implement prescaled versions for biweight. 13 years ago
  Reimar Döffinger da1ba4e88b Fix NASM compilation. 13 years ago
  Christophe Gisquet e5c9de2ab7 rv40: x86 SIMD for biweight 13 years ago