There are no independant uses of mips32r2 instructions except for the
FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I
am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway.
Since these fpu instructions are available on mips64 (non-r2), enable them
there as well.
Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to
HAVE_MIPSFPU anyway).
mips32r2 is left in the list of options form compatability so that using
--disable-mips32r2 doesn't break anything.
Signed-off-by: James Cowgill <james410@cowgill.org.uk>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This is consistent with usual ARM nomenclature as well as with the
VFPV3 and NEON symbols which both lack the ARM prefix.
Signed-off-by: Mans Rullgard <mans@mansr.com>
AMR NB and WB decoders are optimized for MIPS architecture.
Appropriate Makefiles are changed accordingly.
Cnfigure script is changed in order to support optimizations.
Optimizations are enabled by default when compiling is done for
mips architecture.
Appropriate cflags are automatically set.
Support for several mips CPUs is added in configure script.
New ffmpeg options are added for disabling optimizations.
The FFMPEG option --disable-mipsfpu disables MIPS floating point
optimizations.
The FFMPEG option --disable-mips32r2 disables MIPS32R2
optimizations.
The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1
optimizations.
The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2
optimizations.
Signed-off-by: Nedeljko Babic <nbabic@mips.com>
Reviewed-by: Vitor Sessak <vitor1001@gmail.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
James Cowgill
Janne Grunau
Diego Biurrun
Mans Rullgard
Nedeljko Babic