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x86: cabac: fix register constraints for 32-bit mode

Some operands need to be accessed in byte mode, which restricts the
available registers in 32-bit mode.  Using the 'q' constraint selects
a suitable register.

Signed-off-by: Mans Rullgard <mans@mansr.com>
tags/n0.8
Mans Rullgard 14 years ago
parent
commit
c5ee740745
2 changed files with 3 additions and 3 deletions
  1. +1
    -1
      libavcodec/x86/cabac.h
  2. +2
    -2
      libavcodec/x86/h264_i386.h

+ 1
- 1
libavcodec/x86/cabac.h View File

@@ -98,7 +98,7 @@ static av_always_inline int get_cabac_inline_x86(CABACContext *c,
"movl %2, %a6(%5) \n\t"
"movl %1, %a7(%5) \n\t"

:"=&r"(bit), "=&r"(low), "=&r"(range), "=&r"(tmp)
:"=&r"(bit), "=&r"(low), "=&r"(range), "=&q"(tmp)
:"r"(state), "r"(c),
"i"(offsetof(CABACContext, range)), "i"(offsetof(CABACContext, low)),
"i"(offsetof(CABACContext, bytestream))


+ 2
- 2
libavcodec/x86/h264_i386.h View File

@@ -89,7 +89,7 @@ static int decode_significance_x86(CABACContext *c, int max_coeff,

"movl %5, %a11(%6) \n\t"
"movl %3, %a12(%6) \n\t"
:"=&r"(coeff_count), "+r"(significant_coeff_ctx_base), "+m"(index),
:"=&q"(coeff_count), "+r"(significant_coeff_ctx_base), "+m"(index),
"=&r"(low), "=&r"(bit), "=&r"(range)
:"r"(c), "m"(minusstart), "m"(end), "m"(minusindex), "m"(last_off),
"i"(offsetof(CABACContext, range)), "i"(offsetof(CABACContext, low)),
@@ -157,7 +157,7 @@ static int decode_significance_8x8_x86(CABACContext *c,

"movl %5, %a12(%7) \n\t"
"movl %3, %a13(%7) \n\t"
:"=&r"(coeff_count),"+m"(last), "+m"(index), "=&r"(low), "=&r"(bit),
:"=&q"(coeff_count),"+m"(last), "+m"(index), "=&r"(low), "=&r"(bit),
"=&r"(range), "=&r"(state)
:"r"(c), "m"(minusindex), "m"(significant_coeff_ctx_base), "m"(sig_off), "m"(last_off),
"i"(offsetof(CABACContext, range)), "i"(offsetof(CABACContext, low)),


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