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@@ -28,6 +28,9 @@ |
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#include "libavcodec/dsputil.h" |
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#include "libavcodec/dsputil.h" |
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#include "dsputil_mmx.h" |
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#include "dsputil_mmx.h" |
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#define OP_PUT(S,D) |
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#define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t" |
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/** Add rounder from mm7 to mm3 and pack result at destination */ |
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/** Add rounder from mm7 to mm3 and pack result at destination */ |
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#define NORMALIZE_MMX(SHIFT) \ |
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#define NORMALIZE_MMX(SHIFT) \ |
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"paddw %%mm7, %%mm3 \n\t" /* +bias-r */ \ |
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"paddw %%mm7, %%mm3 \n\t" /* +bias-r */ \ |
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@@ -35,11 +38,14 @@ |
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"psraw "SHIFT", %%mm3 \n\t" \ |
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"psraw "SHIFT", %%mm3 \n\t" \ |
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"psraw "SHIFT", %%mm4 \n\t" |
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"psraw "SHIFT", %%mm4 \n\t" |
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#define TRANSFER_DO_PACK \ |
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#define TRANSFER_DO_PACK(OP) \ |
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"packuswb %%mm4, %%mm3 \n\t" \ |
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"packuswb %%mm4, %%mm3 \n\t" \ |
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OP((%2), %%mm3) \ |
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"movq %%mm3, (%2) \n\t" |
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"movq %%mm3, (%2) \n\t" |
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#define TRANSFER_DONT_PACK \ |
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#define TRANSFER_DONT_PACK(OP) \ |
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OP(0(%2), %%mm3) \ |
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OP(8(%2), %%mm4) \ |
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"movq %%mm3, 0(%2) \n\t" \ |
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"movq %%mm3, 0(%2) \n\t" \ |
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"movq %%mm4, 8(%2) \n\t" |
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"movq %%mm4, 8(%2) \n\t" |
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@@ -107,98 +113,107 @@ static void vc1_put_ver_16b_shift2_mmx(int16_t *dst, |
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* Data is already unpacked, so some operations can directly be made from |
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* Data is already unpacked, so some operations can directly be made from |
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* memory. |
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* memory. |
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*/ |
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*/ |
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static void vc1_put_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride, |
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const int16_t *src, int rnd) |
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{ |
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int h = 8; |
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src -= 1; |
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rnd -= (-1+9+9-1)*1024; /* Add -1024 bias */ |
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__asm__ volatile( |
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LOAD_ROUNDER_MMX("%4") |
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"movq "MANGLE(ff_pw_128)", %%mm6\n\t" |
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"movq "MANGLE(ff_pw_9)", %%mm5 \n\t" |
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"1: \n\t" |
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"movq 2*0+0(%1), %%mm1 \n\t" |
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"movq 2*0+8(%1), %%mm2 \n\t" |
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"movq 2*1+0(%1), %%mm3 \n\t" |
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"movq 2*1+8(%1), %%mm4 \n\t" |
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"paddw 2*3+0(%1), %%mm1 \n\t" |
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"paddw 2*3+8(%1), %%mm2 \n\t" |
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"paddw 2*2+0(%1), %%mm3 \n\t" |
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"paddw 2*2+8(%1), %%mm4 \n\t" |
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"pmullw %%mm5, %%mm3 \n\t" |
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"pmullw %%mm5, %%mm4 \n\t" |
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"psubw %%mm1, %%mm3 \n\t" |
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"psubw %%mm2, %%mm4 \n\t" |
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NORMALIZE_MMX("$7") |
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/* Remove bias */ |
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"paddw %%mm6, %%mm3 \n\t" |
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"paddw %%mm6, %%mm4 \n\t" |
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TRANSFER_DO_PACK |
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"add $24, %1 \n\t" |
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"add %3, %2 \n\t" |
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"decl %0 \n\t" |
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"jnz 1b \n\t" |
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: "+r"(h), "+r" (src), "+r" (dst) |
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: "r"(stride), "m"(rnd) |
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: "memory" |
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); |
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#define VC1_HOR_16b_SHIFT2(OP, OPNAME)\ |
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static void OPNAME ## vc1_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,\ |
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const int16_t *src, int rnd)\ |
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{\ |
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int h = 8;\ |
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\ |
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src -= 1;\ |
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rnd -= (-1+9+9-1)*1024; /* Add -1024 bias */\ |
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__asm__ volatile(\ |
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LOAD_ROUNDER_MMX("%4")\ |
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"movq "MANGLE(ff_pw_128)", %%mm6\n\t"\ |
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"movq "MANGLE(ff_pw_9)", %%mm5 \n\t"\ |
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"1: \n\t"\ |
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"movq 2*0+0(%1), %%mm1 \n\t"\ |
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"movq 2*0+8(%1), %%mm2 \n\t"\ |
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"movq 2*1+0(%1), %%mm3 \n\t"\ |
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"movq 2*1+8(%1), %%mm4 \n\t"\ |
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"paddw 2*3+0(%1), %%mm1 \n\t"\ |
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"paddw 2*3+8(%1), %%mm2 \n\t"\ |
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"paddw 2*2+0(%1), %%mm3 \n\t"\ |
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"paddw 2*2+8(%1), %%mm4 \n\t"\ |
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"pmullw %%mm5, %%mm3 \n\t"\ |
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"pmullw %%mm5, %%mm4 \n\t"\ |
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"psubw %%mm1, %%mm3 \n\t"\ |
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"psubw %%mm2, %%mm4 \n\t"\ |
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NORMALIZE_MMX("$7")\ |
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/* Remove bias */\ |
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"paddw %%mm6, %%mm3 \n\t"\ |
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"paddw %%mm6, %%mm4 \n\t"\ |
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TRANSFER_DO_PACK(OP)\ |
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"add $24, %1 \n\t"\ |
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"add %3, %2 \n\t"\ |
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"decl %0 \n\t"\ |
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"jnz 1b \n\t"\ |
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: "+r"(h), "+r" (src), "+r" (dst)\ |
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: "r"(stride), "m"(rnd)\ |
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: "memory"\ |
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);\ |
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} |
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} |
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VC1_HOR_16b_SHIFT2(OP_PUT, put_) |
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VC1_HOR_16b_SHIFT2(OP_AVG, avg_) |
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/** |
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/** |
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* Purely vertical or horizontal 1/2 shift interpolation. |
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* Purely vertical or horizontal 1/2 shift interpolation. |
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* Sacrify mm6 for *9 factor. |
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* Sacrify mm6 for *9 factor. |
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*/ |
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*/ |
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static void vc1_put_shift2_mmx(uint8_t *dst, const uint8_t *src, |
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x86_reg stride, int rnd, x86_reg offset) |
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{ |
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rnd = 8-rnd; |
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__asm__ volatile( |
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"mov $8, %%"REG_c" \n\t" |
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LOAD_ROUNDER_MMX("%5") |
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"movq "MANGLE(ff_pw_9)", %%mm6\n\t" |
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"1: \n\t" |
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"movd 0(%0 ), %%mm3 \n\t" |
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"movd 4(%0 ), %%mm4 \n\t" |
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"movd 0(%0,%2), %%mm1 \n\t" |
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"movd 4(%0,%2), %%mm2 \n\t" |
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"add %2, %0 \n\t" |
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"punpcklbw %%mm0, %%mm3 \n\t" |
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"punpcklbw %%mm0, %%mm4 \n\t" |
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"punpcklbw %%mm0, %%mm1 \n\t" |
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"punpcklbw %%mm0, %%mm2 \n\t" |
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"paddw %%mm1, %%mm3 \n\t" |
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"paddw %%mm2, %%mm4 \n\t" |
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"movd 0(%0,%3), %%mm1 \n\t" |
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"movd 4(%0,%3), %%mm2 \n\t" |
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"pmullw %%mm6, %%mm3 \n\t" /* 0,9,9,0*/ |
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"pmullw %%mm6, %%mm4 \n\t" /* 0,9,9,0*/ |
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"punpcklbw %%mm0, %%mm1 \n\t" |
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"punpcklbw %%mm0, %%mm2 \n\t" |
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"psubw %%mm1, %%mm3 \n\t" /*-1,9,9,0*/ |
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"psubw %%mm2, %%mm4 \n\t" /*-1,9,9,0*/ |
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"movd 0(%0,%2), %%mm1 \n\t" |
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"movd 4(%0,%2), %%mm2 \n\t" |
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"punpcklbw %%mm0, %%mm1 \n\t" |
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"punpcklbw %%mm0, %%mm2 \n\t" |
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"psubw %%mm1, %%mm3 \n\t" /*-1,9,9,-1*/ |
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"psubw %%mm2, %%mm4 \n\t" /*-1,9,9,-1*/ |
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NORMALIZE_MMX("$4") |
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"packuswb %%mm4, %%mm3 \n\t" |
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"movq %%mm3, (%1) \n\t" |
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"add %6, %0 \n\t" |
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"add %4, %1 \n\t" |
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"dec %%"REG_c" \n\t" |
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"jnz 1b \n\t" |
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: "+r"(src), "+r"(dst) |
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: "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd), |
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"g"(stride-offset) |
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: "%"REG_c, "memory" |
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); |
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#define VC1_SHIFT2(OP, OPNAME)\ |
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static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\ |
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x86_reg stride, int rnd, x86_reg offset)\ |
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{\ |
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rnd = 8-rnd;\ |
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__asm__ volatile(\ |
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"mov $8, %%"REG_c" \n\t"\ |
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LOAD_ROUNDER_MMX("%5")\ |
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"movq "MANGLE(ff_pw_9)", %%mm6\n\t"\ |
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"1: \n\t"\ |
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"movd 0(%0 ), %%mm3 \n\t"\ |
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"movd 4(%0 ), %%mm4 \n\t"\ |
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"movd 0(%0,%2), %%mm1 \n\t"\ |
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"movd 4(%0,%2), %%mm2 \n\t"\ |
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"add %2, %0 \n\t"\ |
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"punpcklbw %%mm0, %%mm3 \n\t"\ |
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"punpcklbw %%mm0, %%mm4 \n\t"\ |
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"punpcklbw %%mm0, %%mm1 \n\t"\ |
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"punpcklbw %%mm0, %%mm2 \n\t"\ |
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"paddw %%mm1, %%mm3 \n\t"\ |
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"paddw %%mm2, %%mm4 \n\t"\ |
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"movd 0(%0,%3), %%mm1 \n\t"\ |
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"movd 4(%0,%3), %%mm2 \n\t"\ |
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"pmullw %%mm6, %%mm3 \n\t" /* 0,9,9,0*/\ |
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"pmullw %%mm6, %%mm4 \n\t" /* 0,9,9,0*/\ |
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"punpcklbw %%mm0, %%mm1 \n\t"\ |
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"punpcklbw %%mm0, %%mm2 \n\t"\ |
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"psubw %%mm1, %%mm3 \n\t" /*-1,9,9,0*/\ |
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"psubw %%mm2, %%mm4 \n\t" /*-1,9,9,0*/\ |
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"movd 0(%0,%2), %%mm1 \n\t"\ |
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"movd 4(%0,%2), %%mm2 \n\t"\ |
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"punpcklbw %%mm0, %%mm1 \n\t"\ |
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"punpcklbw %%mm0, %%mm2 \n\t"\ |
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"psubw %%mm1, %%mm3 \n\t" /*-1,9,9,-1*/\ |
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"psubw %%mm2, %%mm4 \n\t" /*-1,9,9,-1*/\ |
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NORMALIZE_MMX("$4")\ |
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"packuswb %%mm4, %%mm3 \n\t"\ |
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OP((%1), %%mm3)\ |
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"movq %%mm3, (%1) \n\t"\ |
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"add %6, %0 \n\t"\ |
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"add %4, %1 \n\t"\ |
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"dec %%"REG_c" \n\t"\ |
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"jnz 1b \n\t"\ |
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: "+r"(src), "+r"(dst)\ |
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: "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\ |
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"g"(stride-offset)\ |
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: "%"REG_c, "memory"\ |
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);\ |
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} |
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} |
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VC1_SHIFT2(OP_PUT, put_) |
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VC1_SHIFT2(OP_AVG, avg_) |
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/** |
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/** |
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* Filter coefficients made global to allow access by all 1 or 3 quarter shift |
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* Filter coefficients made global to allow access by all 1 or 3 quarter shift |
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* interpolation functions. |
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* interpolation functions. |
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@@ -272,7 +287,7 @@ vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src, \ |
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"1: \n\t" \ |
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"1: \n\t" \ |
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MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \ |
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MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \ |
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NORMALIZE_MMX("%6") \ |
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NORMALIZE_MMX("%6") \ |
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TRANSFER_DONT_PACK \ |
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TRANSFER_DONT_PACK(OP_PUT) \ |
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/* Last 3 (in fact 4) bytes on the line */ \ |
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/* Last 3 (in fact 4) bytes on the line */ \ |
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"movd 8+"A1", %%mm1 \n\t" \ |
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"movd 8+"A1", %%mm1 \n\t" \ |
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DO_UNPACK("%%mm1") \ |
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DO_UNPACK("%%mm1") \ |
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@@ -312,9 +327,9 @@ vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src, \ |
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* @param NAME Either 1 or 3 |
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* @param NAME Either 1 or 3 |
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* @see MSPEL_FILTER13_CORE for information on A1->A4 |
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* @see MSPEL_FILTER13_CORE for information on A1->A4 |
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*/ |
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*/ |
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#define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4) \ |
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#define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME) \ |
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static void \ |
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static void \ |
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vc1_put_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \ |
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OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \ |
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const int16_t *src, int rnd) \ |
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const int16_t *src, int rnd) \ |
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{ \ |
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{ \ |
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int h = 8; \ |
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int h = 8; \ |
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@@ -331,7 +346,7 @@ vc1_put_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \ |
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/* Remove bias */ \ |
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/* Remove bias */ \ |
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"paddw "MANGLE(ff_pw_128)", %%mm3 \n\t" \ |
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"paddw "MANGLE(ff_pw_128)", %%mm3 \n\t" \ |
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"paddw "MANGLE(ff_pw_128)", %%mm4 \n\t" \ |
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"paddw "MANGLE(ff_pw_128)", %%mm4 \n\t" \ |
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TRANSFER_DO_PACK \ |
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TRANSFER_DO_PACK(OP) \ |
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"add $24, %1 \n\t" \ |
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"add $24, %1 \n\t" \ |
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"add %3, %2 \n\t" \ |
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"add %3, %2 \n\t" \ |
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"decl %0 \n\t" \ |
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"decl %0 \n\t" \ |
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@@ -350,9 +365,9 @@ vc1_put_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \ |
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* @param NAME Either 1 or 3 |
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* @param NAME Either 1 or 3 |
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* @see MSPEL_FILTER13_CORE for information on A1->A4 |
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* @see MSPEL_FILTER13_CORE for information on A1->A4 |
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*/ |
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*/ |
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#define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4) \ |
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#define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME) \ |
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static void \ |
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static void \ |
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vc1_put_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \ |
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OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \ |
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x86_reg stride, int rnd, x86_reg offset) \ |
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x86_reg stride, int rnd, x86_reg offset) \ |
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{ \ |
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{ \ |
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int h = 8; \ |
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int h = 8; \ |
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@@ -366,7 +381,7 @@ vc1_put_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \ |
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"1: \n\t" \ |
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"1: \n\t" \ |
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MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \ |
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MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \ |
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NORMALIZE_MMX("$6") \ |
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NORMALIZE_MMX("$6") \ |
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TRANSFER_DO_PACK \ |
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TRANSFER_DO_PACK(OP) \ |
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"add %5, %1 \n\t" \ |
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"add %5, %1 \n\t" \ |
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"add %5, %2 \n\t" \ |
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"add %5, %2 \n\t" \ |
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"decl %0 \n\t" \ |
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"decl %0 \n\t" \ |
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@@ -378,14 +393,18 @@ vc1_put_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \ |
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} |
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} |
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/** 1/4 shift bicubic interpolation */ |
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/** 1/4 shift bicubic interpolation */ |
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MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )") |
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MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_PUT, put_) |
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MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_AVG, avg_) |
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MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )") |
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MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )") |
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MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)") |
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MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_) |
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MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_) |
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/** 3/4 shift bicubic interpolation */ |
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/** 3/4 shift bicubic interpolation */ |
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MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )") |
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MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_PUT, put_) |
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MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_AVG, avg_) |
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MSPEL_FILTER13_VER_16B(shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )") |
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MSPEL_FILTER13_VER_16B(shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )") |
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MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)") |
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MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_) |
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MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_) |
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typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift); |
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typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift); |
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typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd); |
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typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd); |
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@@ -402,50 +421,58 @@ typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_ |
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* @param hmode Vertical filter. |
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* @param hmode Vertical filter. |
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* @param rnd Rounding bias. |
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* @param rnd Rounding bias. |
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*/ |
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*/ |
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static void vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride, |
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int hmode, int vmode, int rnd) |
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{ |
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static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] = |
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{ NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx }; |
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static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] = |
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{ NULL, vc1_put_hor_16b_shift1_mmx, vc1_put_hor_16b_shift2_mmx, vc1_put_hor_16b_shift3_mmx }; |
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static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] = |
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{ NULL, vc1_put_shift1_mmx, vc1_put_shift2_mmx, vc1_put_shift3_mmx }; |
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__asm__ volatile( |
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"pxor %%mm0, %%mm0 \n\t" |
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::: "memory" |
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); |
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if (vmode) { /* Vertical filter to apply */ |
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if (hmode) { /* Horizontal filter to apply, output to tmp */ |
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static const int shift_value[] = { 0, 5, 1, 5 }; |
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int shift = (shift_value[hmode]+shift_value[vmode])>>1; |
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int r; |
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DECLARE_ALIGNED_16(int16_t, tmp[12*8]); |
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r = (1<<(shift-1)) + rnd-1; |
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vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift); |
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vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd); |
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return; |
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} |
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else { /* No horizontal filter, output 8 lines to dst */ |
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vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride); |
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return; |
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} |
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} |
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/* Horizontal mode with no vertical mode */ |
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vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1); |
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#define VC1_MSPEL_MC(OP)\ |
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static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\ |
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int hmode, int vmode, int rnd)\ |
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{\ |
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static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\ |
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{ NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\ |
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static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\ |
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{ NULL, OP ## vc1_hor_16b_shift1_mmx, OP ## vc1_hor_16b_shift2_mmx, OP ## vc1_hor_16b_shift3_mmx };\ |
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static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\ |
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{ NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\ |
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\ |
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__asm__ volatile(\ |
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"pxor %%mm0, %%mm0 \n\t"\ |
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::: "memory"\ |
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);\ |
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\ |
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if (vmode) { /* Vertical filter to apply */\ |
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if (hmode) { /* Horizontal filter to apply, output to tmp */\ |
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static const int shift_value[] = { 0, 5, 1, 5 };\ |
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int shift = (shift_value[hmode]+shift_value[vmode])>>1;\ |
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int r;\ |
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DECLARE_ALIGNED_16(int16_t, tmp[12*8]);\ |
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\ |
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r = (1<<(shift-1)) + rnd-1;\ |
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vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\ |
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\ |
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vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\ |
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return;\ |
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}\ |
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else { /* No horizontal filter, output 8 lines to dst */\ |
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vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\ |
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return;\ |
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}\ |
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}\ |
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\ |
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/* Horizontal mode with no vertical mode */\ |
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vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\ |
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} |
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} |
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VC1_MSPEL_MC(put_) |
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VC1_MSPEL_MC(avg_) |
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void ff_put_vc1_mspel_mc00_mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd); |
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void ff_put_vc1_mspel_mc00_mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd); |
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void ff_avg_vc1_mspel_mc00_mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd); |
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/** Macro to ease bicubic filter interpolation functions declarations */ |
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/** Macro to ease bicubic filter interpolation functions declarations */ |
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|
#define DECLARE_FUNCTION(a, b) \ |
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#define DECLARE_FUNCTION(a, b) \ |
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static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \ |
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static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \ |
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vc1_mspel_mc(dst, src, stride, a, b, rnd); \ |
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put_vc1_mspel_mc(dst, src, stride, a, b, rnd); \ |
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}\ |
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static void avg_vc1_mspel_mc ## a ## b ## _mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \ |
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avg_vc1_mspel_mc(dst, src, stride, a, b, rnd); \ |
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} |
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} |
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DECLARE_FUNCTION(0, 1) |
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DECLARE_FUNCTION(0, 1) |
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|
@@ -468,6 +495,8 @@ DECLARE_FUNCTION(3, 2) |
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DECLARE_FUNCTION(3, 3) |
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DECLARE_FUNCTION(3, 3) |
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void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx) { |
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void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx) { |
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mm_flags = mm_support(); |
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dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx; |
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dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx; |
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dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx; |
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dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx; |
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dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx; |
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dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx; |
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@@ -487,4 +516,26 @@ void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx) { |
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dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx; |
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dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx; |
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dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx; |
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dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx; |
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dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx; |
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dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx; |
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if (mm_flags & FF_MM_MMX2){ |
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dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_mmx2; |
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dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_mmx2; |
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} |
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} |
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} |