This avoid going through constants.c while still sharing them with proresdsp.asm Reviewed-by: "Ronald S. Bultje" <rsbultje@gmail.com> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>tags/n3.0
| @@ -89,31 +89,3 @@ DECLARE_ALIGNED(32, const ymm_reg, ff_pd_8192) = { 0x0000200000002000ULL, 0x000 | |||||
| 0x0000200000002000ULL, 0x0000200000002000ULL }; | 0x0000200000002000ULL, 0x0000200000002000ULL }; | ||||
| DECLARE_ALIGNED(32, const ymm_reg, ff_pd_65535)= { 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL, | DECLARE_ALIGNED(32, const ymm_reg, ff_pd_65535)= { 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL, | ||||
| 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL }; | 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL }; | ||||
| /* simple idct 10 */ | |||||
| #define W1sh2 22725 // W1 = 90901 = 22725<<2 + 1 | |||||
| #define W2sh2 21407 // W2 = 85627 = 21407<<2 - 1 | |||||
| #define W3sh2 19265 // W3 = 77062 = 19265<<2 + 2 | |||||
| #define W4sh2 16384 // W4 = 65535 = 16384<<2 - 1 | |||||
| #define W5sh2 12873 // W5 = 51491 = 12873<<2 - 1 | |||||
| #define W6sh2 8867 // W6 = 35468 = 8867<<2 | |||||
| #define W7sh2 4520 // W7 = 18081 = 4520<<2 + 1 | |||||
| #define TIMES4(a, b) \ | |||||
| (((b)&0xFFFFLL)<<48)+(((a)&0xFFFFLL)<<32)+(((b)&0xFFFFLL)<<16)+((a)&0xFFFFLL), \ | |||||
| (((b)&0xFFFFLL)<<48)+(((a)&0xFFFFLL)<<32)+(((b)&0xFFFFLL)<<16)+((a)&0xFFFFLL) | |||||
| #if ARCH_X86_64 | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w4_plus_w2) = { TIMES4(W4sh2, W2sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w4_min_w2) = { TIMES4(W4sh2, -W2sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w4_plus_w6) = { TIMES4(W4sh2, +W6sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w4_min_w6) = { TIMES4(W4sh2, -W6sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w1_plus_w3) = { TIMES4(W1sh2, +W3sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w3_min_w1) = { TIMES4(W3sh2, -W1sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w7_plus_w3) = { TIMES4(W7sh2, +W3sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w3_min_w7) = { TIMES4(W3sh2, -W7sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w1_plus_w5) = { TIMES4(W1sh2, +W5sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w5_min_w1) = { TIMES4(W5sh2, -W1sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w5_plus_w7) = { TIMES4(W5sh2, +W7sh2) }; | |||||
| DECLARE_ALIGNED(16, const xmm_reg, ff_w7_min_w5) = { TIMES4(W7sh2, -W5sh2) }; | |||||
| #endif | |||||
| @@ -68,20 +68,4 @@ extern const ymm_reg ff_pd_32; | |||||
| extern const ymm_reg ff_pd_8192; | extern const ymm_reg ff_pd_8192; | ||||
| extern const ymm_reg ff_pd_65535; | extern const ymm_reg ff_pd_65535; | ||||
| # if ARCH_X86_64 | |||||
| /* simple_idct10, used by prores and dnxhd */ | |||||
| extern const xmm_reg ff_w4_plus_w2; | |||||
| extern const xmm_reg ff_w4_min_w2; | |||||
| extern const xmm_reg ff_w4_plus_w6; | |||||
| extern const xmm_reg ff_w4_min_w6; | |||||
| extern const xmm_reg ff_w1_plus_w3; | |||||
| extern const xmm_reg ff_w3_min_w1; | |||||
| extern const xmm_reg ff_w7_plus_w3; | |||||
| extern const xmm_reg ff_w3_min_w7; | |||||
| extern const xmm_reg ff_w1_plus_w5; | |||||
| extern const xmm_reg ff_w5_min_w1; | |||||
| extern const xmm_reg ff_w5_plus_w7; | |||||
| extern const xmm_reg ff_w7_min_w5; | |||||
| # endif | |||||
| #endif /* AVCODEC_X86_CONSTANTS_H */ | #endif /* AVCODEC_X86_CONSTANTS_H */ | ||||
| @@ -32,6 +32,19 @@ pw_88: times 8 dw 0x2008 | |||||
| cextern pw_1 | cextern pw_1 | ||||
| cextern pw_4 | cextern pw_4 | ||||
| cextern pw_1019 | cextern pw_1019 | ||||
| ; Below are defined in simple_idct10.asm built from selecting idctdsp | |||||
| cextern w4_plus_w2 | |||||
| cextern w4_min_w2 | |||||
| cextern w4_plus_w6 | |||||
| cextern w4_min_w6 | |||||
| cextern w1_plus_w3 | |||||
| cextern w3_min_w1 | |||||
| cextern w7_plus_w3 | |||||
| cextern w3_min_w7 | |||||
| cextern w1_plus_w5 | |||||
| cextern w5_min_w1 | |||||
| cextern w5_plus_w7 | |||||
| cextern w7_min_w5 | |||||
| %include "libavcodec/x86/simple_idct10_template.asm" | %include "libavcodec/x86/simple_idct10_template.asm" | ||||
| @@ -37,6 +37,32 @@ pd_round_12: times 4 dd 1<<(12-1) | |||||
| pd_round_15: times 4 dd 1<<(15-1) | pd_round_15: times 4 dd 1<<(15-1) | ||||
| pd_round_19: times 4 dd 1<<(19-1) | pd_round_19: times 4 dd 1<<(19-1) | ||||
| %macro CONST_DEC 3 | |||||
| const %1 | |||||
| times 4 dw %2, %3 | |||||
| %endmacro | |||||
| %define W1sh2 22725 ; W1 = 90901 = 22725<<2 + 1 | |||||
| %define W2sh2 21407 ; W2 = 85627 = 21407<<2 - 1 | |||||
| %define W3sh2 19265 ; W3 = 77062 = 19265<<2 + 2 | |||||
| %define W4sh2 16384 ; W4 = 65535 = 16384<<2 - 1 | |||||
| %define W5sh2 12873 ; W5 = 51491 = 12873<<2 - 1 | |||||
| %define W6sh2 8867 ; W6 = 35468 = 8867<<2 | |||||
| %define W7sh2 4520 ; W7 = 18081 = 4520<<2 + 1 | |||||
| CONST_DEC w4_plus_w2, W4sh2, +W2sh2 | |||||
| CONST_DEC w4_min_w2, W4sh2, -W2sh2 | |||||
| CONST_DEC w4_plus_w6, W4sh2, +W6sh2 | |||||
| CONST_DEC w4_min_w6, W4sh2, -W6sh2 | |||||
| CONST_DEC w1_plus_w3, W1sh2, +W3sh2 | |||||
| CONST_DEC w3_min_w1, W3sh2, -W1sh2 | |||||
| CONST_DEC w7_plus_w3, W7sh2, +W3sh2 | |||||
| CONST_DEC w3_min_w7, W3sh2, -W7sh2 | |||||
| CONST_DEC w1_plus_w5, W1sh2, +W5sh2 | |||||
| CONST_DEC w5_min_w1, W5sh2, -W1sh2 | |||||
| CONST_DEC w5_plus_w7, W5sh2, +W7sh2 | |||||
| CONST_DEC w7_min_w5, W7sh2, -W5sh2 | |||||
| %include "libavcodec/x86/simple_idct10_template.asm" | %include "libavcodec/x86/simple_idct10_template.asm" | ||||
| section .text align=16 | section .text align=16 | ||||
| @@ -26,19 +26,6 @@ | |||||
| %if ARCH_X86_64 | %if ARCH_X86_64 | ||||
| cextern w4_plus_w2 | |||||
| cextern w4_min_w2 | |||||
| cextern w4_plus_w6 | |||||
| cextern w4_min_w6 | |||||
| cextern w1_plus_w3 | |||||
| cextern w3_min_w1 | |||||
| cextern w7_plus_w3 | |||||
| cextern w3_min_w7 | |||||
| cextern w1_plus_w5 | |||||
| cextern w5_min_w1 | |||||
| cextern w5_plus_w7 | |||||
| cextern w7_min_w5 | |||||
| ; interleave data while maintaining source | ; interleave data while maintaining source | ||||
| ; %1=type, %2=dstlo, %3=dsthi, %4=src, %5=interleave | ; %1=type, %2=dstlo, %3=dsthi, %4=src, %5=interleave | ||||
| %macro SBUTTERFLY3 5 | %macro SBUTTERFLY3 5 | ||||