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Rack/plugins/community/repos/AudibleInstruments/eurorack/marbles/drivers/adc.cc

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  1. // Copyright 2015 Olivier Gillet.

  2. //

  3. // Author: Olivier Gillet (ol.gillet@gmail.com)

  4. //

  5. // Permission is hereby granted, free of charge, to any person obtaining a copy

  6. // of this software and associated documentation files (the "Software"), to deal

  7. // in the Software without restriction, including without limitation the rights

  8. // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

  9. // copies of the Software, and to permit persons to whom the Software is

  10. // furnished to do so, subject to the following conditions:

  11. // 

  12. // The above copyright notice and this permission notice shall be included in

  13. // all copies or substantial portions of the Software.

  14. // 

  15. // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

  16. // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

  17. // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

  18. // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

  19. // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

  20. // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

  21. // THE SOFTWARE.

  22. // 

  23. // See http://creativecommons.org/licenses/MIT/ for more information.

  24. //

  25. // -----------------------------------------------------------------------------

  26. //

  27. // Driver for ADC. ADC1 is used for the 8 pots ; ADC2 for the 8 CV inputs.

  28. 

  29. #include "marbles/drivers/adc.h"

  30. 

  31. #include <stm32f4xx_conf.h>

  32. 

  33. namespace marbles {

  34.   

  35. void Adc::Init(bool single_channel) {

  36.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);

  37.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);

  38.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);

  39.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);

  40.   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

  41.   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);

  42.   

  43.   DMA_InitTypeDef dma_init;

  44.   ADC_CommonInitTypeDef adc_common_init;

  45.   ADC_InitTypeDef adc_init;

  46.   GPIO_InitTypeDef gpio_init;

  47.   

  48.   // Initialize A0..A7 (ADC0..ADC7)

  49.   gpio_init.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3;

  50.   gpio_init.GPIO_Pin |= GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;

  51.   gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;

  52.   gpio_init.GPIO_Mode = GPIO_Mode_AN;

  53.   GPIO_Init(GPIOA, &gpio_init);

  54. 

  55.   // Initialize B0..B1 (ADC8..ADC9)

  56.   gpio_init.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;

  57.   gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;

  58.   gpio_init.GPIO_Mode = GPIO_Mode_AN;

  59.   GPIO_Init(GPIOB, &gpio_init);

  60. 

  61.   // Initialize C0..C5 (ADC10..ADC11)

  62.   gpio_init.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3;

  63.   gpio_init.GPIO_Pin |= GPIO_Pin_4 | GPIO_Pin_5;

  64.   gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;

  65.   gpio_init.GPIO_Mode = GPIO_Mode_AN;

  66.   GPIO_Init(GPIOC, &gpio_init);

  67. 

  68.   // Use DMA to automatically copy ADC data register to values_ buffer.

  69.   dma_init.DMA_Channel = DMA_Channel_0;

  70.   dma_init.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;

  71.   dma_init.DMA_Memory0BaseAddr = (uint32_t)&values_[ADC_GROUP_POT];

  72.   dma_init.DMA_DIR = DMA_DIR_PeripheralToMemory;

  73.   dma_init.DMA_BufferSize = single_channel ? 1 : ADC_CHANNEL_LAST;

  74.   dma_init.DMA_PeripheralInc = DMA_PeripheralInc_Disable;

  75.   dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable; 

  76.   dma_init.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;

  77.   dma_init.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;

  78.   dma_init.DMA_Mode = DMA_Mode_Circular;

  79.   dma_init.DMA_Priority = DMA_Priority_High;

  80.   dma_init.DMA_FIFOMode = DMA_FIFOMode_Disable;

  81.   dma_init.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;

  82.   dma_init.DMA_MemoryBurst = DMA_MemoryBurst_Single;

  83.   dma_init.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;

  84.   DMA_Init(DMA2_Stream0, &dma_init);

  85.   DMA_Cmd(DMA2_Stream0, ENABLE);

  86.   

  87.   dma_init.DMA_Channel = DMA_Channel_1;

  88.   dma_init.DMA_PeripheralBaseAddr = (uint32_t)&ADC2->DR;

  89.   dma_init.DMA_Memory0BaseAddr = (uint32_t)&values_[ADC_GROUP_CV];

  90.   DMA_Init(DMA2_Stream2, &dma_init);

  91.   DMA_Cmd(DMA2_Stream2, ENABLE);

  92.   

  93.   adc_common_init.ADC_Mode = ADC_Mode_Independent;

  94.   adc_common_init.ADC_Prescaler = ADC_Prescaler_Div8;

  95.   adc_common_init.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;

  96.   adc_common_init.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles;

  97.   ADC_CommonInit(&adc_common_init);

  98.   

  99.   adc_init.ADC_Resolution = ADC_Resolution_12b;

  100.   adc_init.ADC_ScanConvMode = ENABLE;

  101.   adc_init.ADC_ContinuousConvMode = DISABLE;

  102.   adc_init.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;

  103.   adc_init.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;

  104.   adc_init.ADC_DataAlign = ADC_DataAlign_Left;

  105.   adc_init.ADC_NbrOfConversion = single_channel ? 1 : ADC_CHANNEL_LAST;

  106.   ADC_Init(ADC1, &adc_init);

  107.   ADC_Init(ADC2, &adc_init);

  108.   

  109.   // 168M / 2 / 8 / (8 x (144 + 20)) = 8.001kHz.

  110.   if (single_channel) {

  111.     ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 1, ADC_SampleTime_144Cycles);

  112.   } else {

  113.     ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 1, ADC_SampleTime_144Cycles);

  114.     ADC_RegularChannelConfig(ADC1, ADC_Channel_9, 2, ADC_SampleTime_144Cycles); 

  115.     ADC_RegularChannelConfig(ADC1, ADC_Channel_12,3, ADC_SampleTime_144Cycles); 

  116.     ADC_RegularChannelConfig(ADC1, ADC_Channel_2,4, ADC_SampleTime_144Cycles); 

  117.     ADC_RegularChannelConfig(ADC1, ADC_Channel_15,5, ADC_SampleTime_144Cycles); 

  118.     ADC_RegularChannelConfig(ADC1, ADC_Channel_10,6, ADC_SampleTime_144Cycles); 

  119.     ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 7, ADC_SampleTime_144Cycles);

  120.     ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 8, ADC_SampleTime_144Cycles); 

  121.   }

  122.   

  123.   if (single_channel) {

  124.     ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 1, ADC_SampleTime_144Cycles); 

  125.   } else {

  126.     ADC_RegularChannelConfig(ADC2, ADC_Channel_5, 1, ADC_SampleTime_144Cycles);

  127.     ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 2, ADC_SampleTime_144Cycles); 

  128.     ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 3, ADC_SampleTime_144Cycles); 

  129.     ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 4, ADC_SampleTime_144Cycles); 

  130.     ADC_RegularChannelConfig(ADC2, ADC_Channel_4, 5, ADC_SampleTime_144Cycles); 

  131.     ADC_RegularChannelConfig(ADC2, ADC_Channel_7, 6, ADC_SampleTime_144Cycles); 

  132.     ADC_RegularChannelConfig(ADC2, ADC_Channel_14,7, ADC_SampleTime_144Cycles);

  133.     ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 8, ADC_SampleTime_144Cycles); 

  134.   }

  135.   

  136.   ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);

  137.   ADC_DMARequestAfterLastTransferCmd(ADC2, ENABLE);

  138.   ADC_Cmd(ADC1, ENABLE);

  139.   ADC_Cmd(ADC2, ENABLE);

  140.   ADC_DMACmd(ADC1, ENABLE);

  141.   ADC_DMACmd(ADC2, ENABLE);

  142.   Convert();

  143. }

  144. 

  145. void Adc::DeInit() {

  146.   DMA_Cmd(DMA2_Stream0, DISABLE);

  147.   DMA_Cmd(DMA2_Stream2, DISABLE);

  148.   ADC_DMARequestAfterLastTransferCmd(ADC1, DISABLE);

  149.   ADC_DMARequestAfterLastTransferCmd(ADC2, DISABLE);

  150.   ADC_Cmd(ADC1, DISABLE);

  151.   ADC_Cmd(ADC2, DISABLE);

  152.   ADC_DMACmd(ADC1, DISABLE);

  153.   ADC_DMACmd(ADC2, DISABLE);

  154.   ADC_DeInit();

  155. }

  156. 

  157. void Adc::Convert() {

  158.   ADC_SoftwareStartConv(ADC1);

  159.   ADC_SoftwareStartConv(ADC2);

  160. }

  161. 

  162. }  // namespace marbles