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Rack/plugins/community/repos/Southpole/eurorack/rings/drivers/adc.cc

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  1. // Copyright 2015 Olivier Gillet.

  2. //

  3. // Author: Olivier Gillet (ol.gillet@gmail.com)

  4. //

  5. // Permission is hereby granted, free of charge, to any person obtaining a copy

  6. // of this software and associated documentation files (the "Software"), to deal

  7. // in the Software without restriction, including without limitation the rights

  8. // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

  9. // copies of the Software, and to permit persons to whom the Software is

  10. // furnished to do so, subject to the following conditions:

  11. // 

  12. // The above copyright notice and this permission notice shall be included in

  13. // all copies or substantial portions of the Software.

  14. // 

  15. // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

  16. // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

  17. // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

  18. // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

  19. // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

  20. // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

  21. // THE SOFTWARE.

  22. // 

  23. // See http://creativecommons.org/licenses/MIT/ for more information.

  24. //

  25. // -----------------------------------------------------------------------------

  26. //

  27. // Driver for ADC1 - used for scanning CVs, and ADC2 - used for scanning pots.

  28. 

  29. #include "rings/drivers/adc.h"

  30. 

  31. #include <stm32f4xx_conf.h>

  32. 

  33. namespace rings {

  34. 

  35. /* static */

  36. uint8_t Adc::addresses_[ADC_CHANNEL_NUM_MUXED] = {

  37.   7, // ADC_CHANNEL_POT_BRIGHTNESS,

  38.   5, // ADC_CHANNEL_POT_DAMPING,

  39.   3, // ADC_CHANNEL_POT_POSITION,

  40.   4, // ADC_CHANNEL_ATTENUVERTER_FREQUENCY,

  41.   1, // ADC_CHANNEL_ATTENUVERTER_STRUCTURE,

  42.   6, // ADC_CHANNEL_ATTENUVERTER_BRIGHTNESS,

  43.   0, // ADC_CHANNEL_ATTENUVERTER_DAMPING,

  44.   2, // ADC_CHANNEL_ATTENUVERTER_POSITION,

  45. };

  46.   

  47. void Adc::Init() {

  48.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);

  49.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);

  50.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);

  51.   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);

  52.   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

  53.   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);

  54.   

  55.   DMA_InitTypeDef dma_init;

  56.   ADC_CommonInitTypeDef adc_common_init;

  57.   ADC_InitTypeDef adc_init;

  58.   GPIO_InitTypeDef gpio_init;

  59.   

  60.   gpio_init.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;

  61.   gpio_init.GPIO_Pin |= GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;

  62.   gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;

  63.   gpio_init.GPIO_Mode = GPIO_Mode_AN;

  64.   GPIO_Init(GPIOA, &gpio_init);

  65. 

  66.   gpio_init.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3;

  67.   gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;

  68.   gpio_init.GPIO_Mode = GPIO_Mode_AN;

  69.   GPIO_Init(GPIOC, &gpio_init);

  70.   

  71.   // Configure the address lines for the MUX.

  72.   gpio_init.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;

  73.   gpio_init.GPIO_Mode = GPIO_Mode_OUT;

  74.   gpio_init.GPIO_OType = GPIO_OType_PP;

  75.   gpio_init.GPIO_Speed = GPIO_Speed_2MHz;

  76.   gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;

  77.   GPIO_Init(GPIOB, &gpio_init);

  78.   GPIO_ResetBits(GPIOB, GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7);

  79.   

  80.   // Use DMA to automatically copy ADC data register to values_ buffer.

  81.   dma_init.DMA_Channel = DMA_Channel_0;

  82.   dma_init.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR; 

  83.   dma_init.DMA_Memory0BaseAddr = (uint32_t)&values_[0]; 

  84.   dma_init.DMA_DIR = DMA_DIR_PeripheralToMemory;

  85.   dma_init.DMA_BufferSize = ADC_CHANNEL_NUM_DIRECT; 

  86.   dma_init.DMA_PeripheralInc = DMA_PeripheralInc_Disable; 

  87.   dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable; 

  88.   dma_init.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; 

  89.   dma_init.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; 

  90.   dma_init.DMA_Mode = DMA_Mode_Circular; 

  91.   dma_init.DMA_Priority = DMA_Priority_High;

  92.   dma_init.DMA_FIFOMode = DMA_FIFOMode_Disable;         

  93.   dma_init.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;

  94.   dma_init.DMA_MemoryBurst = DMA_MemoryBurst_Single;

  95.   dma_init.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;

  96.   DMA_Init(DMA2_Stream0, &dma_init);

  97.   DMA_Cmd(DMA2_Stream0, ENABLE);

  98.   

  99.   adc_common_init.ADC_Mode = ADC_Mode_Independent;

  100.   adc_common_init.ADC_Prescaler = ADC_Prescaler_Div8;

  101.   adc_common_init.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;

  102.   adc_common_init.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;

  103.   ADC_CommonInit(&adc_common_init);

  104.   

  105.   adc_init.ADC_Resolution = ADC_Resolution_12b;

  106.   adc_init.ADC_ScanConvMode = ENABLE;

  107.   adc_init.ADC_ContinuousConvMode = DISABLE;

  108.   adc_init.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;

  109.   adc_init.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;

  110.   adc_init.ADC_DataAlign = ADC_DataAlign_Left;

  111.   adc_init.ADC_NbrOfConversion = ADC_CHANNEL_NUM_DIRECT;

  112.   ADC_Init(ADC1, &adc_init);

  113.   

  114.   adc_init.ADC_Resolution = ADC_Resolution_12b;

  115.   adc_init.ADC_ScanConvMode = DISABLE;

  116.   adc_init.ADC_ContinuousConvMode = DISABLE;

  117.   adc_init.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;

  118.   adc_init.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;

  119.   adc_init.ADC_DataAlign = ADC_DataAlign_Left;

  120.   adc_init.ADC_NbrOfConversion = 1;

  121.   ADC_Init(ADC2, &adc_init);

  122.   

  123.   // 168M / 2 / 8 / (9 x (480 + 5) + 0 x (144 + 5)) = 2.4kHz.

  124.   // ADC_CHANNEL_CV_FREQUENCY,

  125.   // ADC_CHANNEL_CV_STRUCTURE,

  126.   // ADC_CHANNEL_CV_BRIGHTNESS,

  127.   // ADC_CHANNEL_CV_DAMPING,

  128.   // ADC_CHANNEL_CV_POSITION,

  129.   // ADC_CHANNEL_CV_STRENGTH,

  130.   // ADC_CHANNEL_CV_V_OCT,

  131.   // ADC_CHANNEL_POT_FREQUENCY,

  132.   // ADC_CHANNEL_POT_STRUCTURE,

  133.   ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 1, ADC_SampleTime_480Cycles);

  134.   ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 2, ADC_SampleTime_480Cycles); 

  135.   ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 3, ADC_SampleTime_480Cycles); 

  136.   ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 4, ADC_SampleTime_480Cycles); 

  137.   ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 5, ADC_SampleTime_480Cycles);

  138.   ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 6, ADC_SampleTime_480Cycles); 

  139.   ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 7, ADC_SampleTime_480Cycles); 

  140.   ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 8, ADC_SampleTime_480Cycles);

  141. 

  142.   ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_480Cycles);

  143.   

  144.   ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);

  145.   ADC_Cmd(ADC1, ENABLE);

  146.   ADC_Cmd(ADC2, ENABLE);

  147.   ADC_DMACmd(ADC1, ENABLE);

  148.   

  149.   index_ = ADC_CHANNEL_NUM_MUXED - 1;

  150.   last_read_ = 0;

  151.   state_ = false;

  152.   Convert();

  153. }

  154. 

  155. void Adc::DeInit() {

  156.   DMA_Cmd(DMA2_Stream0, DISABLE);

  157.   ADC_DMARequestAfterLastTransferCmd(ADC1, DISABLE);

  158.   ADC_Cmd(ADC1, DISABLE);

  159.   ADC_Cmd(ADC2, DISABLE);

  160.   ADC_DMACmd(ADC1, DISABLE);

  161.   ADC_DeInit();

  162. }

  163. 

  164. void Adc::Convert() {

  165.   ADC_SoftwareStartConv(ADC1);

  166.   

  167.   if (state_) {

  168.     // Read the value from the previous conversion.

  169.     values_[ADC_CHANNEL_POT_BRIGHTNESS + index_] = ADC2->DR;

  170.     last_read_ = index_;

  171.     ++index_;

  172.     if (index_ >= ADC_CHANNEL_NUM_MUXED) {

  173.       index_ = 0;

  174.     }

  175.   

  176.     uint8_t address = addresses_[index_];

  177.   

  178.     // Write the mux address.

  179.     GPIO_WriteBit(GPIOB, GPIO_Pin_7, static_cast<BitAction>(address & 1));

  180.     GPIO_WriteBit(GPIOB, GPIO_Pin_6, static_cast<BitAction>(address & 2));

  181.     GPIO_WriteBit(GPIOB, GPIO_Pin_5, static_cast<BitAction>(address & 4));

  182.   } else {

  183.     ADC_SoftwareStartConv(ADC2);

  184.   }

  185.   

  186.   state_ = !state_;

  187. }

  188. 

  189. 

  190. }  // namespace rings