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@@ -240,42 +240,7 @@ void FLAC__cpu_info(FLAC__CPUInfo *info) |
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disable_sse(info);
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# endif
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#elif defined(__linux__)
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int sse = 0;
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struct sigaction sigill_save;
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struct sigaction sigill_sse;
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sigill_sse.sa_sigaction = sigill_handler_sse_os;
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#ifdef __ANDROID__
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sigemptyset (&sigill_sse.sa_mask);
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#else
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__sigemptyset(&sigill_sse.sa_mask);
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#endif
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sigill_sse.sa_flags = SA_SIGINFO | SA_RESETHAND; /* SA_RESETHAND just in case our SIGILL return jump breaks, so we don't get stuck in a loop */
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if(0 == sigaction(SIGILL, &sigill_sse, &sigill_save))
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{
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/* http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html */
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/* see sigill_handler_sse_os() for an explanation of the following: */
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asm volatile (
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"xorps %%xmm0,%%xmm0\n\t" /* will cause SIGILL if unsupported by OS */
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"incl %0\n\t" /* SIGILL handler will jump over this */
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/* landing zone */
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"nop\n\t" /* SIGILL jump lands here if "inc" is 9 bytes */
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"nop\n\t"
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"nop\n\t"
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"nop\n\t"
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"nop\n\t"
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"nop\n\t"
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"nop\n\t" /* SIGILL jump lands here if "inc" is 3 bytes (expected) */
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"nop\n\t"
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"nop" /* SIGILL jump lands here if "inc" is 1 byte */
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: "=r"(sse)
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: "0"(sse)
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);
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sigaction(SIGILL, &sigill_save, NULL);
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}
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if(!sse)
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disable_sse(info);
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int sse = 1;
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#elif defined(_MSC_VER)
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__try {
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__asm {
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@@ -287,30 +252,7 @@ void FLAC__cpu_info(FLAC__CPUInfo *info) |
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disable_sse(info);
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}
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#elif defined(__GNUC__) /* MinGW goes here */
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int sse = 0;
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/* Based on the idea described in Agner Fog's manual "Optimizing subroutines in assembly language" */
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/* In theory, not guaranteed to detect lack of OS SSE support on some future Intel CPUs, but in practice works (see the aforementioned manual) */
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if (ia32_fxsr) {
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struct {
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FLAC__uint32 buff[128];
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} __attribute__((aligned(16))) fxsr;
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FLAC__uint32 old_val, new_val;
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asm volatile ("fxsave %0" : "=m" (fxsr) : "m" (fxsr));
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old_val = fxsr.buff[50];
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fxsr.buff[50] ^= 0x0013c0de; /* change value in the buffer */
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asm volatile ("fxrstor %0" : "=m" (fxsr) : "m" (fxsr)); /* try to change SSE register */
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fxsr.buff[50] = old_val; /* restore old value in the buffer */
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asm volatile ("fxsave %0 " : "=m" (fxsr) : "m" (fxsr)); /* old value will be overwritten if SSE register was changed */
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new_val = fxsr.buff[50]; /* == old_val if FXRSTOR didn't change SSE register and (old_val ^ 0x0013c0de) otherwise */
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fxsr.buff[50] = old_val; /* again restore old value in the buffer */
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asm volatile ("fxrstor %0" : "=m" (fxsr) : "m" (fxsr)); /* restore old values of registers */
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if ((old_val^new_val) == 0x0013c0de)
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sse = 1;
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}
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if(!sse)
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disable_sse(info);
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int sse = 1;
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#else
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/* no way to test, disable to be safe */
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disable_sse(info);
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